A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.

A compound semiconductor device includes a carrier supply layer, a channel layer disposed over the carrier supply layer and configured to include InGaAs, and an etching stopper layer disposed over the channel layer, and configured to include a first layer disposed over the channel layer and configured to include In.sub.x1Ga.sub.1-x1P, and a second layer disposed over the first layer and configured to include In.sub.x2Ga.sub.1-x2P, wherein x1 is greater than 0 and less than or equal to 1, x2 is greater than or equal to 0 and less than 1, and x1 is greater than x2.

A compound semiconductor device includes a carrier supply layer, a channel layer disposed over the carrier supply layer and configured to include InGaAs, and an etching stopper layer disposed over the channel layer, and configured to include a first layer disposed over the channel layer and configured to include In.sub.x1Ga.sub.1-x1P, and a second layer disposed over the first layer and configured to include In.sub.x2Ga.sub.1-x2P, wherein x1 is greater than 0 and less than or equal to 1, x2 is greater than or equal to 0 and less than 1, and x1 is greater than x2.

An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

An uplink multiple input-multiple output (MIMO) transmitter apparatus includes a transmitter chain that includes a sigma-delta circuit that creates a summed (sigma) signal and a difference (delta) signal from two original signals to be transmitted. These new sigma and delta signals are amplified by power amplifiers to a desired output level before having two signals reconstructed from the amplified sigma and amplified delta signals by a second circuit. These reconstructed signals match the two original signals in content but are at a desired amplified level relative to the two original signals. The reconstructed signals are then transmitted through respective antennas as uplink signals. By employing this uplink MIMO transmitter apparatus, it is possible to use smaller power amplifiers, which may reduce footprint, power consumption, and costs of the uplink MIMO transmitter apparatus.

Devices and methods include voltage buses. The devices also include one or more power amplifiers coupled to the voltage bus. Each of the one or more power amplifiers include one or more transistors. The devices also include a model that is configured to emulate leakage from at least one of the one or more transistors. A current mirror with a first transistor coupled to the model and a second transistor coupled to the voltage bus. The current mirror is configure to draw charge from the voltage bus based at least in part on the emulated leakage from the model.

Devices and methods include voltage buses. The devices also include one or more power amplifiers coupled to the voltage bus. Each of the one or more power amplifiers include one or more transistors. The devices also include a model that is configured to emulate leakage from at least one of the one or more transistors. A current mirror with a first transistor coupled to the model and a second transistor coupled to the voltage bus. The current mirror is configure to draw charge from the voltage bus based at least in part on the emulated leakage from the model.

The present invention provides a linear amplifier including an amplifier stage, a DC-shifting stage, a compensation network and a power stage. The amplifier stage is configured to generate a first signal and a second signal. The DC-shifting stage is configured to adjust a DC voltage of the first signal and a DC voltage of the second signal to generate an adjusted first signal and an adjusted second signal. The compensation network is configured to generate a first driving signal and a second driving signal according to the first signal, the second signal, the adjusted first signal and the adjusted second signal. The power stage is configured to generate an output signal according to the first driving signal and the second driving signal.

A distributed power management circuit is provided. In embodiments disclosed herein, the distributed power management circuit can achieve multiple performance enhancing objectives simultaneously. More specifically, the distributed power management circuit can be configured to switch a modulated voltage from one voltage level to another within a very short switching window, reduce in-rush current required for switching the modulated voltage, and minimize a ripple in the modulated voltage, all at same time. As a result, the distributed power management circuit can be provided in a wireless device (e.g., smartphone) to enable very fast voltage switching across a wide modulation bandwidth (e.g., 400 MHz) with reduced power consumption and voltage distortion.

The present disclosure generally relates to techniques and apparatus for implementing an envelope-tracking power supply for a radio frequency (RF) power amplifier. One aspect includes an amplification system. The amplification system may include a first amplifier configured to generate an amplifier output voltage, a second amplifier having an output coupled to a supply node for the first amplifier, a voltage regulator having an output coupled to a supply node for the second amplifier, and control circuitry configured to control the voltage regulator to generate a supply voltage at the supply node for the second amplifier based on an indication associated with the amplifier output voltage. In some aspects, the control circuitry may be configured to control the voltage regulator through at least providing an updated control setting for the voltage regulator with a periodicity associated with a power control period.