Patent classifications
H03F3/217
Super-efficient single-stage isolated switching power amplifier
A super-efficient single-stage switching power amplifier is realized by not incorporating a rectification process in its power conversion loop while incorporating a bidirectional active clamping circuit to not only remove or maximally reduce otherwise occurring disruptive ringing and spikes but also convert the energy otherwise associated with the ringing and spikes to return energy that goes back to the DC power supply.
REGENERATION CIRCULATOR, HIGH-FREQUENCY POWER SUPPLY DEVICE, AND HIGH-FREQUENCY POWER REGENERATION METHOD
An excessive voltage rise of load voltage, caused by an impedance mismatching on a transmission path, is prevented, and high-frequency power is regenerated. A parallel impedance is connected to the transmission path during the voltage rise, thereby regenerating voltage caused by a standing wave and preventing excessive load voltage, together with enhancing energy usage efficiency. Establishing the parallel impedance for the load impedance, on the transmission path between the high-frequency amplifier circuit of the high-frequency power supply device and the high-frequency load, reduces impedance at the connecting position to prevent generation of excessive voltage on the transmission path, and high-frequency power is regenerated from the transmission path by the parallel impedance.
AUDIO SIGNAL AMPLIFICATION DEVICE, POWER SUPPLY DEVICE, AND POWER SUPPLY CONTROL METHOD
An audio signal amplification device includes: a clock generation circuit that generates a clock for use in amplifying an audio signal; and a power supply circuit that generates direct current power, which is supplied to the clock generation circuit, from input power. The power supply circuit includes: a constant voltage generation circuit that generates direct current power of a constant voltage from the input power; a first capacitor; a first charging circuit that charges the first capacitor by using the input power; and a selection circuit. The selection circuit selects one direct current power of the direct current power generated in the constant voltage generation circuit and of direct current power charged to the first capacitor, and supplies the selected direct current power to the clock generation circuit.
AUDIO SIGNAL AMPLIFICATION DEVICE, POWER SUPPLY DEVICE, AND POWER SUPPLY CONTROL METHOD
An audio signal amplification device includes: a clock generation circuit that generates a clock for use in amplifying an audio signal; and a power supply circuit that generates direct current power, which is supplied to the clock generation circuit, from input power. The power supply circuit includes: a constant voltage generation circuit that generates direct current power of a constant voltage from the input power; a first capacitor; a first charging circuit that charges the first capacitor by using the input power; and a selection circuit. The selection circuit selects one direct current power of the direct current power generated in the constant voltage generation circuit and of direct current power charged to the first capacitor, and supplies the selected direct current power to the clock generation circuit.
DRIVER CIRCUITS
The application describes a switched driver (401) for outputting a drive signal at an output node (402) to drive a load such as a transducer. The driver receives respective high-side and low-side voltages (VinH, VinL) defining an input voltage at first and second input nodes and has connections for first and second capacitors (403H, 403L). A network of switching paths is configured such that each of the first and second capacitors can be selectively charged to the input voltage, the first input node can be selectively coupled to a first node (N1) by a path that include or bypass the first capacitor, and the second input node can be selectively coupled to a second node (N2) by a path that includes or bypasses the second capacitor. The output node (402) can be switched between two switching voltages at the first or second nodes. The driver is selectively operable in different operating modes, where the switching voltages are different in each of said modes.
BTL OUTPUT SELF-OSCILLATING CLASS D AMPLIFIER
A Bridge-Tied Load output self-oscillating class D amplifier includes a comparator receives an input signal from a signal input circuit at a second input terminal and outputs a positive-phase pulse width modulation signal and a reverse-phase pulse width modulation signal by comparing voltages of the two input terminal, first and second switching circuits power-amplifies the reverse-phase pulse width modulation signal and the positive-phase pulse width modulation signal, a first low-pass filter extracts a first output signal from the reverse-phase pulse width modulation signal, a second low-pass filter extracts a second output signal from the positive-phase pulse width modulation signal, a subtractor calculates a difference between the first and second output signals and output a difference signal, and a first feedback circuit feeds back the difference signal to the second input terminal of the comparator.
BTL OUTPUT SELF-OSCILLATING CLASS D AMPLIFIER
A Bridge-Tied Load output self-oscillating class D amplifier includes a comparator receives an input signal from a signal input circuit at a second input terminal and outputs a positive-phase pulse width modulation signal and a reverse-phase pulse width modulation signal by comparing voltages of the two input terminal, first and second switching circuits power-amplifies the reverse-phase pulse width modulation signal and the positive-phase pulse width modulation signal, a first low-pass filter extracts a first output signal from the reverse-phase pulse width modulation signal, a second low-pass filter extracts a second output signal from the positive-phase pulse width modulation signal, a subtractor calculates a difference between the first and second output signals and output a difference signal, and a first feedback circuit feeds back the difference signal to the second input terminal of the comparator.
POWER SUPPLY CIRCUIT AND IMAGE FORMING APPARATUS
A half bridge circuit of a class-D amplifier outputs a voltage in accordance with switching of a first switching element and of a second switching element, to a load. A high side gate drive circuit and a low side gate drive circuit respectively drive the first and second switching elements. A bootstrap capacitor connected between the high side gate drive circuit and an output terminal of the half bridge circuit is charged by a charging current from a second direct-current power supply while the first switching element is off. An inductance component for noise suppression, and a voltage limit element that is connected in parallel with the inductance component and is for limiting a voltage that occurs at the inductance component are provided on a path in which the charging current flows.
POWER SUPPLY CIRCUIT AND IMAGE FORMING APPARATUS
A half bridge circuit of a class-D amplifier outputs a voltage in accordance with switching of a first switching element and of a second switching element, to a load. A high side gate drive circuit and a low side gate drive circuit respectively drive the first and second switching elements. A bootstrap capacitor connected between the high side gate drive circuit and an output terminal of the half bridge circuit is charged by a charging current from a second direct-current power supply while the first switching element is off. An inductance component for noise suppression, and a voltage limit element that is connected in parallel with the inductance component and is for limiting a voltage that occurs at the inductance component are provided on a path in which the charging current flows.
CLASS-D AMPLIFIER WHICH CAN SUPPRESS DIFFERENTIAL MODE POWER NOISE
A class-D amplifier configured to adjust at least one input signal to at least one output signal. The class-D amplifier comprises: a loop filter, configured to receive the input signal; a PWM circuit, configured to generate at least one PWM signal; a summing circuit, coupled between an output of the loop filter and an input of the PWM circuit; an output circuit operating at a supply voltage, configured to generate the output signal responding to the PWM signal; and a supply voltage filter, configured to monitor the supply voltage to generate a filtered signal to the summing circuit. The summing circuit is configured to sum the output of the loop filter and the filtered signal to adjust a common-mode level of the input of the PWM circuit.