An amplifier system may include at least one input source, a converter configured to provide voltage rails to an amplifier, the voltage rails including a first voltage rail and a second voltage rail, a MOSFET arranged at a secondary side of the system at the first voltage rail, a second MOSFET arranged at the first voltage rail, a third MOSFET arranged at the second voltage rail, a fourth MOSFET arranged at the second voltage rail; and, a first capacitor arranged at the first voltage rail and a second capacitor arranged at the second voltage rail, the first and forth MOSFETS are configured to operate simultaneously with one another and the second and third MOSFETs are configured to operate simultaneously with one another and opposite of the first and fourth MOSFETs so as to allow synchronous rectification so that the first and second capacitors reciprocally and mutually exclusively charge and discharge.

The disclosure presents a method and an amplifier system for minimizing variation in an acoustical signal caused by variation in gain of an amplifier, comprising a battery for providing a supply voltage to the amplifier, a digital signal processor for providing the acoustical signal to the amplifier, a controller unit receiving an enablement signal when the supply voltage is in an offset mode, and based on the enablement signal requesting a measured voltage during a time period, and a first analog-to-digital converter configured for measuring the supply voltage to the amplifier when receiving the request from the controller unit or the first analog-to-digital converter is configured for measuring the supply voltage to the amplifier continuously, and where variations in the measured voltage relates to variations in the supply voltage during the time period. Furthermore, the controller unit is configured to predict offset modes (i.e. changes) in the supply voltage based on the enablement signals and a fitting of the measured voltages, and wherein the controller unit is configured to generate a compensating signal based on the fitting and transmit the compensating signal to the digital signal processor, the digital signal processor is then configured to minimize variation in the acoustical signal at the output of the amplifier by compensating the variation in gain of the amplifier based on the compensating signal.

Disclosed are a signal processing device and an image display apparatus including the same. The signal processing device includes an amplifier to perform amplification based on an input differential signal, an output driver to output an audio output signal based on an output signal from the amplifier, a reference voltage output device to output a reference voltage in response to power ON, a pre-output driver configured to pre-compensate for an offset voltage and output a compensation signal, based on an output signal from the amplifier after the power ON, and a first switching device disposed between an output terminal of the output driver and an output terminal of the pre-output driver, wherein the output driver operates after the first switching device is turned on in response to the power ON. Accordingly, pop noise and harmonic distortion in case in which power is turned on may be reduced.

In an embodiment, a class-D amplifier includes an input terminal configured to receive an input signal; a comparator having an input coupled to the input terminal; a deglitching circuit having an input coupled to an output of the comparator; and a driving circuit having an input coupled to an output of the deglitching circuit. The deglitching circuit includes a logic circuit coupled between the input of the deglitching circuit and the output of the deglitching circuit. The logic circuit is configured to receive a clock signal having the same frequency as the switching frequency of the class-D amplifier.

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.

A switching amplifier includes: a driver circuit with differential inputs and differential outputs; and a fault detection circuit coupled to the differential outputs. The fault detection circuit includes: a power supply input; and a sense circuit coupled to the differential outputs. The sense circuit includes: a first resistor between the power supply input and a positive output of the differential outputs; a second resistor between the positive output and ground; a third resistor between the power supply input and a negative output of the differential outputs; and a fourth resistor between the negative output and ground. The fault detection circuit also includes an analyzer circuit coupled to the sense circuit and configured to determine a fault location relative to the differential outputs based on an output of the sense circuit.

A switching amplifier includes: a driver circuit with differential inputs and differential outputs; and a fault detection circuit coupled to the differential outputs. The fault detection circuit includes: a power supply input; and a sense circuit coupled to the differential outputs. The sense circuit includes: a first resistor between the power supply input and a positive output of the differential outputs; a second resistor between the positive output and ground; a third resistor between the power supply input and a negative output of the differential outputs; and a fourth resistor between the negative output and ground. The fault detection circuit also includes an analyzer circuit coupled to the sense circuit and configured to determine a fault location relative to the differential outputs based on an output of the sense circuit.

A class-D driver circuit includes a feedback loop including an input integrator stage, a switched modulator, and an output driver stage. A feedback resistor connects an output terminal of the output driver stage with an input node of the input integrator stage to provide a feedback current. The class-D driver circuit also includes a compensation circuit configured to provide a compensation current to an output node of the input integrator stage to relieve a slew rate limitation of the feedback loop, the compensation current having a magnitude based on the magnitude of the feedback current.

A class-D driver circuit includes a feedback loop including an input integrator stage, a switched modulator, and an output driver stage. A feedback resistor connects an output terminal of the output driver stage with an input node of the input integrator stage to provide a feedback current. The class-D driver circuit also includes a compensation circuit configured to provide a compensation current to an output node of the input integrator stage to relieve a slew rate limitation of the feedback loop, the compensation current having a magnitude based on the magnitude of the feedback current.

In certain examples, methods and semiconductor structures are directed to a switching (power) amplification circuit, including resonance circuitry to resonate at a frequency associated with at least one of a plurality of different selectable resonance frequencies. The switching amplification circuit is configured to deliver power to one or multiple loads while the switching amplifier circuit is operating based on one or more of the selectable resonance frequencies.