A startup circuit for a bandgap reference source can include a first transistor coupled to a supply source and configured to provide a current to a reference resistance when the bandgap reference source is turned on, to thereby provide a reference voltage at a first node between the first transistor and the reference resistance, a second transistor coupled to the supply source to provide a second node therebetween, the second transistor having a gate coupled to the first node, such that the second transistor is off and a startup voltage at the second node is up when the reference voltage is at or below a threshold voltage, and the second transistor is on and the startup voltage at the second node is down when the reference voltage exceeds the threshold voltage, and a third transistor implemented between the supply source and a startup node of a bandgap core, the third transistor having a gate coupled to the second node such that the third transistor turns on to inject a startup current to the startup node when the startup voltage is up, and turns off when the startup voltage is down.

A startup circuit for a bandgap reference source can include a first transistor coupled to a supply source and configured to provide a current to a reference resistance when the bandgap reference source is turned on, to thereby provide a reference voltage at a first node between the first transistor and the reference resistance, a second transistor coupled to the supply source to provide a second node therebetween, the second transistor having a gate coupled to the first node, such that the second transistor is off and a startup voltage at the second node is up when the reference voltage is at or below a threshold voltage, and the second transistor is on and the startup voltage at the second node is down when the reference voltage exceeds the threshold voltage, and a third transistor implemented between the supply source and a startup node of a bandgap core, the third transistor having a gate coupled to the second node such that the third transistor turns on to inject a startup current to the startup node when the startup voltage is up, and turns off when the startup voltage is down.

A class-D amplifier having an output driver with a first, second, and third driver, the output driver having a first output coupled to the first and third drivers, a second output coupled to the second driver; a sensing resistor coupled in series between the first driver and the first output; and a pulse width modulation (PWM) controller coupled to the inputs of the drivers and configured to receive an audio input signal; control a PWM generator to generate a first pulse signal and a second pulse signal based on the audio input signal and a power supply input; determine a voltage drop across the sensing resistor; and, responsive to the voltage drop being greater than a threshold, sequence control of the first pulse signal to the first driver and switch a voltage at the first driver to an increased voltage based on the voltage drop.

In some embodiments, an output driver can include a first driver circuit configured to operate with a first supply voltage and generate an output signal having an amplitude in a first range, and a second driver circuit configured to operate with a second supply voltage and generate an output signal having an amplitude in a second range. The output driver can further include a controller configured to operate any one of the first and second driver circuits, such that an output signal of the output driver has an amplitude in an overall range that includes the first and second ranges, and a switch circuit implemented to isolate one driver circuit from another driver circuit when the driver circuit is inactive and the other driver circuit is active.

Amplifying a signal includes outputting an output signal from a Class D amplifier configured to operate as a current driver to a load, such as a loudspeaker, the output of the Class D amplifier controlled by a feedback loop, and, in the feedback loop: performing analog filtering using an active analog filter on an error signal that is based on the output of the Class D amplifier and a reference signal, digitizing a filtered output of the analog filter to produce a sequence of digital values, performing digital filtering on the sequence of digital values to produce a sequence of filtered digital values, and generating a pulse signal to control the output of the Class D amplifier based on the sequence of filtered digital values. The digital filter reduces a destabilizing effect of the loudspeaker's inductance. Associated circuits, systems, modules and electronic devices are disclosed.

Amplifying a signal includes outputting an output signal from a Class D amplifier configured to operate as a current driver to a load, such as a loudspeaker, the output of the Class D amplifier controlled by a feedback loop, and, in the feedback loop: performing analog filtering using an active analog filter on an error signal that is based on the output of the Class D amplifier and a reference signal, digitizing a filtered output of the analog filter to produce a sequence of digital values, performing digital filtering on the sequence of digital values to produce a sequence of filtered digital values, and generating a pulse signal to control the output of the Class D amplifier based on the sequence of filtered digital values. The digital filter reduces a destabilizing effect of the loudspeaker's inductance. Associated circuits, systems, modules and electronic devices are disclosed.

In some embodiments, an audio amplifier can include an input for receiving a signal to be amplified, and an amplification stage configured to amplify the signal based on pulse width modulation and provide the amplified signal at an output node. The audio amplifier can further include a feedback circuit implemented between the output node and the input node. The feedback circuit can include a series arrangement of a high bandwidth input common mode loop and a low bandwidth output common mode loop, with the low bandwidth output common mode loop configured to provide a desired phase change for the high bandwidth input common mode loop.

A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.

A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.

A method and system of compensating for component mismatch are disclosed. An example system comprises an amplifier including a current ratio measurement engine (CRME) and a modulator (DSM). The CRME is configured to obtain measurements for each possible configuration of an amplifier circuit and to pass these measurements to a processor for analysis. In the example system, the measurements are obtained by driving a bias current through two or more circuit elements and measuring the ratio in current between the two or more circuit elements, which is representative of the relative mismatch between the two or more components. The DSM is configured to receive adjustment parameters from the processor and to tune the amplifier circuit according to the adjustment parameters to thereby improve the performance of the amplifier.