A decrease in isolation is suppressed when transmitting both a first transmission signal and a second transmission signal in simultaneous communication. A radio frequency module includes a first transformer and a second transformer. The first transformer is included in a first differential power amplifier to amplify the first transmission signal. The second transformer is included in a second differential power amplifier to amplify the second transmission signal to be simultaneously communicated with the first transmission signal. A direction of magnetic flux generated in the first transformer is different from a direction of magnetic flux generated in the second transformer.

A switched capacitor modulator (SCM) includes a RF power amplifier. The RF power amplifier receives a rectified voltage and a RF drive signal and modulates an input signal in accordance with the rectified voltage to generate a RF output signal to an output terminal. A reactance in parallel with the output terminal is configured to vary in response to a control signal to vary an equivalent reactance in parallel with the output terminal. A controller generates the control signal and a commanded phase. The commanded phase controls the RF drive signal. The reactance is at least one of a capacitance or an inductance, and the capacitance or the inductance varies in accordance with the control signal.

A system for power amplifier control includes a processor, a memory in communication with the processor, wherein the processor and the memory are configured to simultaneously provide input signal strength of each of a plurality of power amplifiers in a millimeter wave (mmW) phased array system, determine an average input signal strength of the plurality of power amplifiers based on the provided input signal strengths using an analog-to-digital converter (ADC), determine a voltage headroom for the plurality of power amplifiers based on the determined average input signal strength, estimate a power backoff value based on the voltage headroom, and determine a gain control value based on the estimated power backoff value.

A transceiver interface for a phased array element includes a first magnetic circuit having a primary coil and a secondary coil, a second magnetic circuit having a primary coil, a secondary coil and a tertiary coil, a main amplifier path and an auxiliary amplifier path, the main amplifier path coupled to the primary coil of the second magnetic circuit and configured to receive a quadrature signal, the main amplifier path configured to provide a quadrature output signal, the auxiliary amplifier path coupled to the primary coil of the first magnetic circuit and configured to receive an in-phase signal, the auxiliary amplifier path configured to provide an in-phase output signal, a selectable output circuit configured to selectively combine the in-phase output signal and the quadrature output signal, and a low noise amplifier (LNA) coupled to the tertiary coil of the second magnetic circuit.

A circuit for downlink/uplink operational mode switching in a TDD wireless communication system comprises a field-effect transistor operatively connected to a power amplifier on the downlink path of a RF front-end apparatus in a TDD wireless communication system, a first voltage generator connected to a large-value first resistor, a second voltage generator connected to a second resistor, a large-value hold capacitor, and a sample-and-hold circuit configured to be switched between a reception configuration, wherein the first voltage generator is connected to the gate of the field-effect transistor and the large-value capacitor is connected to the first voltage generator through the first resistor, and a transmission configuration, wherein the gate of the field-effect transistor is connected to the hold capacitor and the hold capacitor is connected to the second voltage generator through the second resistor.

Methods, systems, and devices for wireless communications are described. A user equipment (UE) may transmit a capability message indicating a capability of the UE to perform bandwidth-limited envelope tracking or a capability of the UE to compensate for bandwidth-limited envelope tracking distortion. The UE may receive a request for the UE to activate bandwidth-limited envelope tracking or a request for the UE to compensate for bandwidth-limited envelope tracking distortion. In some examples, the UE may transmit an uplink message using a bandwidth-limited envelope tracking configuration. In other examples, the UE may receive a downlink message and use digital post distortion (DPoD) to correct bandwidth-limited envelope tracking distortions in the downlink message. Aspects of the present disclosure may enable the UE to use bandwidth-limited envelope tracking and DPoD for wideband signal transmissions, which may result in lower power consumption at the UE.

According to one embodiment, a power amplifying device includes a first amplifier configured to output a first output signal, a second amplifier configured to output a second output signal, a first circuit configured to output a third signal obtained by limiting a magnitude of a voltage value of the first output signal and a fourth signal obtained by limiting a magnitude of a voltage value of the second output signal, and a second circuit configured to transmit an average value of a voltage value of the third signal and a voltage value of the fourth signal, as a first feedback voltage to the first amplifier and the second amplifier.

Dynamic optimization of transistor array in power amplifier. In some embodiments, a power amplification system can include a power amplifier including an array of transistors, with the array configured to receive an input signal and provide an amplified signal. The power amplification system can further include a monitoring system including a plurality of sensing circuits implemented at respective locations of the array, and a control system configured to obtain sensed information from the plurality of sensing circuits, and based on the information, generate a pattern of one or more transistor properties over the array to allow operation of the array in a desired manner based on the pattern.

In a power amplifying module in which a plurality of differential amplifying circuits is mounted on a substrate, each of the differential amplifying circuits includes a chip device that includes at least two amplifiers, each of the at least two amplifiers amplifying a differential signal, a balun that includes a primary side winding wire and a secondary side winding wire, both ends of the primary side winding wire being connected to an output of the chip device, and a capacitor provided between a power feed point of the primary side winding wire and a reference potential. In at least one of the plurality of the differential amplifying circuits, the distance from one end of the primary side winding wire to the power feed point is different from the distance from the other end of the primary side winding wire to the power feed point.

An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. A power amplifier may include an amplitude modulation distortion compensation circuit coupled to the input of the power amplifier. The compensation circuit may include adaptive biasing transistors each having a first source-drain terminal coupled to the input of the power amplifier, a second source-drain terminal coupled to a supply voltage, and a gate terminal configured to receive a control voltage via a big resistor. The control voltage can be set to a voltage level so that the adaptive biasing transistors are only turned on when the voltage swing at the input of the power amplifier is relatively large.