A system includes a class D amplifier and a current steering digital-to-analog converter (DAC) directly connected to the class D amplifier. The system also includes a common mode servo circuit coupled to a node interconnecting the current steering DAC to the class D amplifier. The common servo circuit amplifies a difference between a common mode signal determined from the node and a reference voltage and generates a feedback current to the node based on the amplified difference. A feed-forward common-mode compensation circuit is included to reduce an alternating current (AC) ripple from the class D amplifier. The feed-forward common-mode compensation circuit includes first and second resistors coupled to respective outputs of the class D amplifier. A current mirror is coupled to the first and second resistors and is configured to sink a current from the node to ground that approximates a common mode feedback current of the class D amplifier.

An operational amplifier includes an output stage, an input stage, a first auxiliary amplifier, and a second auxiliary amplifier. The output stage includes a first output transistor and a second output transistor. The input stage is configured to drive the output stage. The first auxiliary amplifier is coupled to an output of the input stage and to an input of the first output transistor. The first auxiliary amplifier is configured to bias the first output transistor for class AB operation and to isolate the input stage from a bias voltage applied to the first output transistor. The second auxiliary amplifier is coupled to the output of the input stage and to an input of the second output transistor. The second auxiliary amplifier is configured to bias the second output transistor for class AB operation, and to isolate the input stage from a bias voltage applied to the second output transistor.

An apparatus is provided which comprises: a differential input amplifying stage including a current source and a first node; a first matched pair of transistors coupled to the first node, wherein one of the transistors of the first matched pair is coupled to an output node of a driving stage; a second matched pair of transistors coupled to a second node to bias the second matched pair of transistors, wherein one of the transistors of the second matched pair of transistors is coupled to the output node of the driving stage, and wherein the second node is to be charged according to a first bias of the current source; and a resistive device coupled to the first and second nodes.

A low-power standard-compliant NB-IoT wake-up receiver (WRX) is presented. The WRX is designed as a companion radio to a full NB-IoT receiver, only operating during discontinuous RX modes (DRX and eDRX), which allows the full high-power radio to turn off while the wake-up receiver efficiently receives NB-IoT Wake-Up Signals (WUS). The fabricated receiver achieves 2.1 mW power at 109 dBm sensitivity with 180 KHz bandwidth over the 750-960 MHz bands. The WRX is fabricated in 28 nm CMOS and consumes 5 less power than the best previously published traditional NB-IoT receivers. This disclosure is the first designed dedicated wake-up receiver for the NB-IoT protocol and demonstrates the benefits of utilizing a WRX to reduce power consumption of NB-IoT radios.

An apparatus is provided which comprises: a differential input amplifying stage including a current source and a first node; a first matched pair of transistors coupled to the first node, wherein one of the transistors of the first matched pair is coupled to an output node of a driving stage; a second matched pair of transistors coupled to a second node to bias the second matched pair of transistors, wherein one of the transistors of the second matched pair of transistors is coupled to the output node of the driving stage, and wherein the second node is to be charged according to a first bias of the current source; and a resistive device coupled to the first and second nodes.

Disclosed is a transimpedance amplifier. The transimpedance amplifier includes an inverter configured to have a feedback resistor and amplify a signal provided to an input side, and a common gate amplifier configured to be connected to the inverter in cascade and amplify an output of the inverter, wherein the signal provided to the input side is fed forward to a gate of the common gate amplifier through a gate resistor.

An instrumentation amplifier includes first and second resistors for gain setting. The operational amplifiers within the instrumentation amplifier include selectively enabled current drive sources coupled to the amplifier output. The first and second resistors have variable resistances. A control circuit is configured to select the variable resistances of the first and second resistors to implement a fixed gain for the instrumentation amplifier and further selectively enable the current drive sources. The control circuit receives an indication of a downstream programmable gain (for example, from a downstream programmable gain amplifier). The variable resistances of the first and second resistors are selected to be scaled inversely with respect to the downstream programmable gain and the current drive sources are enabled proportionately with respect to the downstream programmable gain.

Method and implementation of gain-bandwidth product (GWB) tuning are disclosed. In an embodiment an operational amplifier (opamp) includes an input stage of the opamp including a differential device pair coupled to a tail device and configured to be responsive to a differential input signal for conducting a first current and an output stage of the opamp including a class AB interface stage circuit and a pair of output devices connected to the class AB interface stage circuit, wherein a first constant gm bias circuit is coupled to an input terminal of the class AB interface stage circuit.

Provided herein are apparatus and methods for compensating an operational amplifier (op-amp). In certain configurations, a compensation network is electrically connected between an output node of the op-amp and an input differential pair coupled source/emitter tail-current node. The compensation network can include a capacitor having a relatively low value of capacitance. In this manner, op-amp bandwidth is improved while power consumption is reduced to meet a green standard.

Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).