A power amplifier having a stack structure comprises a first driver stage that receives a power voltage from a power supply and receives and amplifies an input signal; a second driver stage that receives the power voltage from the power supply, has an input terminal connected with an output terminal of the first driver stage, and receives and amplifies an output signal from the first driver stage; and a power stage that has a power input terminal connected with a ground terminal of the first driver stage and a ground terminal of the second driver stage and receives a virtual ground voltage, and has an input terminal connected with an output terminal of the second driver stage and receives and amplifies an output signal from the second driver stage.

An apparatus includes a multi-stage amplifier. The multi-stage amplifier includes first, second, and third amplifier circuits coupled in a cascade configuration. The multi-stage amplifier further includes first, second, and third compensation networks. The first compensation network is coupled between the output of the third amplifier circuit and the input of the second amplifier circuit. The second compensation network is coupled between the output of the third amplifier circuit and the input of the third amplifier circuit. The third compensation network is coupled between the output of the second amplifier circuit and the input of the second amplifier circuit.

A signal amplifier includes a band suppression filter configured to suppress a preset band among bands included in an input signal, a first common source-type amplifier connected between a supply terminal of a driving voltage and a ground terminal and configured to amplify a first input signal separated from an output signal of the band suppression filter in a common input node to provide a first amplified signal to a common output node, a second common source-type amplifier configured to amplify a second input signal separated from the output signal of the band suppression filter in the common input node to provide a second amplified signal to the common output node, and an output matcher configured to match levels of impedance between the common output node and an output terminal and to transfer a combined signal to the output terminal.

The present disclosure relates to an amplifier circuit comprising a main amplifier circuit comprising a plurality of first switched-capacitor, SC, house-of-cards, HoC, amplifier cells coupled in parallel between an input and an output of the main amplifier circuit, at least one peak amplifier circuit comprising a plurality of second SC HoC amplifier cells coupled in parallel between an input and an output of the peak amplifier circuit, wherein the output of the main amplifier circuit and the output of the peak amplifier circuit are coupled to a common load.

Disclosed is a power amplifier having an output stage (12) having a radio frequency (RF) output (14) and an RF input (16) and a driver stage (18) having a driver input (20) coupled to the RF input (16), a control input (22), and a driver output (24), wherein the driver stage (18) is configured to have a controllable soft compression characteristic that substantially neutralizes a gain expansion characteristic of the output stage (12). Also included is a controller (26) having a control output (28) coupled to the control input (22) of the driver stage (18), wherein the controller (26) is configured to generate a control signal at the control output (28) that controls the soft compression characteristic of the driver stage (18).

A class AB amplifier may include an input stage, a first folded cascode stage, a second folded cascode stage, and a class AB output stage. In some embodiments, the class AB output stage may provide differential output signals. The common-mode voltage of the differential output signals may be controlled via a correction signal coupled to a selected folded cascode stage. The correction signal may control the common-mode voltage of the differential output signals by altering bias currents within the selected folded cascode stage. The other cascode stage may include bias currents controlled by relatively fixed bias voltages.

Method and implementation of gain-bandwidth product (GWB) tuning are disclosed. In an embodiment an operational amplifier (opamp) includes an input stage of the opamp including a differential device pair coupled to a tail device and configured to be responsive to a differential input signal for conducting a first current and an output stage of the opamp including a class AB interface stage circuit and a pair of output devices connected to the class AB interface stage circuit, wherein a first constant gm bias circuit is coupled to an input terminal of the class AB interface stage circuit.

A method may include providing a power supply voltage to a power supply input of a power amplifier by a charge pump power supply having a select input for selecting an operating mode of the charge pump power supply, such that in a first operating mode, the power supply voltage is equal to a first voltage, and such that in a second operating mode the power supply voltage is equal to a fraction of the first voltage; wherein the power amplifier has an audio input for receiving an audio input signal, and an audio output for providing the output signal, and generates the output signal based on the audio input signal. The method may also include selecting an operating mode of the charge pump power supply based on a magnitude of the power supply voltage and a magnitude of the output signal, such that the charge pump power supply operated in the operating mode having the lowest power supply voltage in which a difference between a magnitude of the power supply voltage and a magnitude of the output signal is more than the predetermined threshold voltage.

An apparatus includes a multi-stage amplifier. The multi-stage amplifier includes first, second, and third amplifier circuits coupled in a cascade configuration. The multi-stage amplifier further includes first, second, and third compensation networks. The first compensation network is coupled between the output of the third amplifier circuit and the input of the second amplifier circuit. The second compensation network is coupled between the output of the third amplifier circuit and the input of the third amplifier circuit. The third compensation network is coupled between the output of the second amplifier circuit and the input of the second amplifier circuit.

An output buffer with an offset cancellation structure for an LCD source driver includes an operational amplifier, for driving an output signal of the output buffer according to a data signal from a data input terminal of the output buffer; a reference voltage generator, for generating a reference voltage and inputting the reference voltage to the operational amplifier; and a sampling capacitor, coupled between a second input terminal of the operational amplifier and the data input terminal of the output buffer in a first phase, and coupled between the second input terminal of the operational amplifier and an output terminal of the operational amplifier in a second phase, wherein the second input terminal of the operational amplifier is further coupled to the output terminal of the operational amplifier in the first phase. The output signal outputs the data signal where the offset voltage is cancelled in the second phase.