A source follower with an input node and an output node includes a first transistor, a second transistor, and a DC (Direct Current) tracking circuit. The first transistor has a control terminal, a first terminal coupled to a first node, and a second terminal coupled to a second node. The second transistor has a control terminal, a first terminal coupled to a ground voltage, and a second terminal coupled to the first node. The DC tracking circuit sets the second DC voltage at the second node to a specific level. The specific level is determined according to the first DC voltage at the first node. The output node of the source follower is coupled to the first node.

A source follower with an input node and an output node includes a first transistor, a second transistor, and a DC (Direct Current) tracking circuit. The first transistor has a control terminal, a first terminal coupled to a first node, and a second terminal coupled to a second node. The second transistor has a control terminal, a first terminal coupled to a ground voltage, and a second terminal coupled to the first node. The DC tracking circuit sets the second DC voltage at the second node to a specific level. The specific level is determined according to the first DC voltage at the first node. The output node of the source follower is coupled to the first node.

A source follower includes a first transistor, a first output module, a second transistor, a second output module and a feedback module. The first terminal and the control terminal of the first transistor are configured to respectively receive a first base voltage and a first control voltage. The second terminal of the first transistor and the first output module are electrically connected to a first output terminal. The first terminal and the control terminal of the second transistor are configured to respectively receive a first base voltage and a second control voltage. The second terminal of the second transistor and the second output module are electrically connected to a second output terminal. The feedback module is electrically connected to the control terminal of the first transistor, the control terminal of the second transistor and a reference node of the second output module.

A source follower includes a first transistor, a first output module, a second transistor, a second output module and a feedback module. The first terminal and the control terminal of the first transistor are configured to respectively receive a first base voltage and a first control voltage. The second terminal of the first transistor and the first output module are electrically connected to a first output terminal. The first terminal and the control terminal of the second transistor are configured to respectively receive a first base voltage and a second control voltage. The second terminal of the second transistor and the second output module are electrically connected to a second output terminal. The feedback module is electrically connected to the control terminal of the first transistor, the control terminal of the second transistor and a reference node of the second output module.

A voltage regulator is disclosed. The voltage regulator is cascaded, including first and second stages. The first stage may be a capacitor-less first stage that includes a source follower implemented with a first PMOS transistor, with the first PMOS transistor receiving a first reference voltage on its respective gate terminal. The first stage is coupled to receive a first voltage from an external voltage supply, and to provide a second voltage to the second stage. The second stage may be directly and exclusively coupled to the first stage, with no capacitor or connection for one coupled to the first stage output. The second stage may provide an output voltage, on an output node, with the output voltage being less than the second voltage.

An amplifier comprising a FET transistor, a bias resistor having a first terminal connected to a gate terminal of the FET transistor, a load resistor having a first terminal connected to a D terminal of the FET transistor, a DC-to-DC step-down converter with an input terminal connected to a supply voltage, and an output terminal connected to a second terminal of the load resistor, a two-pin current-to-voltage converter with a first pin connected to an S terminal of the FET transistor and a second pin connected to ground, and a comparator having a first pin connected to a positive supply voltage, a second pin connected to a negative supply voltage, a third (output) pin connected to a second terminal of the bias resistor, a fourth pin connected to a reference voltage, and a fifth pin connected to the first pin of the current-to-voltage converter.

An amplifier comprising a FET transistor, a bias resistor having a first terminal connected to a gate terminal of the FET transistor, a load resistor having a first terminal connected to a D terminal of the FET transistor, a DC-to-DC step-down converter with an input terminal connected to a supply voltage, and an output terminal connected to a second terminal of the load resistor, a two-pin current-to-voltage converter with a first pin connected to an S terminal of the FET transistor and a second pin connected to ground, and a comparator having a first pin connected to a positive supply voltage, a second pin connected to a negative supply voltage, a third (output) pin connected to a second terminal of the bias resistor, a fourth pin connected to a reference voltage, and a fifth pin connected to the first pin of the current-to-voltage converter.

A power supply system comprises an amplifier stage that includes at least one transistor, for example an LDMOS transistor. The transistor is connected to a supply voltage via a power connection, and is controlled by a control voltage at the control connection of the transistor. In some implementations, a first controller is provided for adjusting the control voltage of the transistor, and a second controller is provided for adjusting the supply voltage. In some implementations, one of the controllers is designed to feed a state signal to the other controller, and the other controller is designed to evaluate the state signal.

A power supply system comprises an amplifier stage that includes at least one transistor, for example an LDMOS transistor. The transistor is connected to a supply voltage via a power connection, and is controlled by a control voltage at the control connection of the transistor. In some implementations, a first controller is provided for adjusting the control voltage of the transistor, and a second controller is provided for adjusting the supply voltage. In some implementations, one of the controllers is designed to feed a state signal to the other controller, and the other controller is designed to evaluate the state signal.

A pseudo resistance circuit is disclosed that is capable of suppressing fluctuation in resistance value with fluctuation in process or temperature and facilitating adjustment. The pseudo resistance circuit includes a first MOSFET, a second MOSFET, a first current source which generates a first current substantially proportional to absolute temperature, and voltage source which generates a first voltage, which is a substantially linear function of absolute temperature. The gate of the first MOSFET and the gate of the second MOSFET are connected together, the second MOSFET is diode-connected, the first current is supplied to the drain of the second MOSFET, the first voltage is applied to the source of the second MOSFET, and a resistor having a resistance value according to the gate voltage of the first MOSFET is formed between the drain and the source of the first MOSFET.