An IC for power conversion includes bias circuitry that generates one or more bias voltages. An adaptive biasing circuit adaptively shifts an input signal having a negative value to a positive value. An operational transconductance amplifier (OTA) receives a supply bias current and the first and second bias voltages. The OTA has first and second input terminals coupled to the input signal and ground, respectively. The OTA has first and second transistors coupled to the first and second input terminals through first and second resistors at first and second internal nodes, respectively. Additional circuitry of the OTA is coupled to the second internal node. The additional circuitry insures that the voltage at the second internal node follows the voltage at the first internal node. The OTA generates an output current signal responsive to a differential input voltage applied across the first and second input terminals.

An IC for power conversion includes bias circuitry that generates one or more bias voltages. An adaptive biasing circuit adaptively shifts an input signal having a negative value to a positive value. An operational transconductance amplifier (OTA) receives a supply bias current and the first and second bias voltages. The OTA has first and second input terminals coupled to the input signal and ground, respectively. The OTA has first and second transistors coupled to the first and second input terminals through first and second resistors at first and second internal nodes, respectively. Additional circuitry of the OTA is coupled to the second internal node. The additional circuitry insures that the voltage at the second internal node follows the voltage at the first internal node. The OTA generates an output current signal responsive to a differential input voltage applied across the first and second input terminals.

Methods form amplifier device structures that include first-third amplifier devices. The first amplifier device produces an intermediate signal. The second amplifier device is connected to an input of the first amplifier device and produces an amplified inverted output signal. The third amplifier device inverts the intermediate signal to produce an amplified non-inverted output signal that is complementary to the amplified inverted output signal. A resistor feedback loop is connected to the input and output of the first amplifier device. A gain ratio of the gain of the third amplifier device to the gain of the second amplifier device matches a resistance ratio of the source resistance of the input signal to the resistance of the resistor added to the source resistance. Also, DC loop circuits are connected to the first-third amplifier devices, and each of the DC loop circuits connects an amplifier device output to an amplifier device input.

A conductance measurement circuit includes an operation amplifier, a bias current source, a compensation current source, and an output stage circuit. In the operation amplifier, a first input end receives a reference voltage, a second input end is coupled to a tested object, and an output end generates a compensation voltage. The bias current source provides a bias current to a bias end. The compensation current source derives the compensation current from the bias end according to the compensation voltage. The output stage circuit provides a trans-conductance value and an output end equivalent resistance, generates an output current according to the compensation voltage, and generates an output signal according to the output current and the trans-conductance value.

A circuit portion comprises a load circuit portion and a bias circuit portion. The load circuit portion comprises a load transistor. The bias circuit portion comprises a replica transistor matched to the load transistor and connected to the load transistor at a node such that when a current flows through the replica transistor, a current proportional to the current through the replica transistor flows through the load transistor. The bias circuit portion also comprises a current input for receiving an input current, a supply voltage input for receiving a supply voltage, and a feedback loop arranged to: adjust a voltage at the node connecting the replica transistor and the load transistor such that the replica transistor conducts a current proportional to the input current, and counteract variations in the voltage at the node connecting the replica transistor and the load transistor arising from changes in the supply voltage.

In one or more embodiments, a fan circuit may be configured with an input of a first amplifier coupled to a revolution indicator associated with a fan; an output of the first amplifier coupled to an input of a second amplifier; and a power supply input of the second amplifier coupled to a first contact of a first connector. In one or more embodiments, the first contact of the first connector may be coupled to a first contact of a second connector to drive a resistive load coupled to the first contact of the second connector; a second contact of the first connector may be coupled to a second contact of the second connector to provide a reference voltage to the second amplifier; and the second amplifier may provide amplified signals to the first contact of the first connector based at least on signals received from the revolution indicator.

A buffer system may have an output for driving a switched load that changes during periods indicated by a switching signal. The buffer system may operate in a closed loop when the switching signal indicates that a load change is not taking place by comparing a signal indicative of the output of the buffer system with a reference voltage. The buffer system may operate in an open loop when the switching signal indicates that a load change is taking place by not comparing signal indicative of the output of the buffer system with the reference voltage. Both the buffer system and the switched load may be on the same chip.

A signal amplifier device is provided to ensure the continuity of the gain of an amplifier. The signal amplifier device includes a main path and a sub path connected in parallel to the main path. A main path first amplifier circuit amplifies an input signal on the main path. A main path second amplifier circuit includes a common-gate transistor connected in series with an output of the main path first amplifier circuit without sharing a DC current. On the main sub path, the sub path amplifier circuit amplifies the input signal by using a gain lower than the maximum gain in the main path.

A signal amplifier device is provided to ensure the continuity of the gain of an amplifier. The signal amplifier device includes a main path and a sub path connected in parallel to the main path. A main path first amplifier circuit amplifies an input signal on the main path. A main path second amplifier circuit includes a common-gate transistor connected in series with an output of the main path first amplifier circuit without sharing a DC current. On the main sub path, the sub path amplifier circuit amplifies the input signal by using a gain lower than the maximum gain in the main path.

A rail-to-rail potentiostat may require an offset current in order to support a bidirectional work electrode current at a work electrode. This offset current may improve measurements of the work electrode current made a dual-slope analog-to-digital converter, especially when the work electrode current is small, but can also lead to inaccuracies (e.g., due to a temperature coefficient) if it is not properly calibrated. Accordingly, bidirectional potentiostat is disclosed that can be configured in a normal configuration for measurement of a work electrode current or a calibration configuration for measurement (i.e., calibration) of an offset current. The reconfigurability allows calibrations to be taken as needed, on a schedule, or as specified by a user. The reconfigurability can also allow for maintaining a work electrode voltage and a work electrode current during calibration so that an electrochemical experiment using a cell coupled to the bidirectional potentiostat is unaffected by the calibration.