A capacitive gain amplifier circuit amplifies an input signal by a pair of differential amplifier circuits couples in series. The first differential amplifier circuit is reset during an autozero phase while disconnected from the second differential amplifier circuit, and the first and second differential amplifier circuits are connected together in series during a chop phase. A set of feedback capacitors is selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the chop phase.

An amplifier circuit having improved common mode rejection is provided. This can be achieved by estimating the common mode value of an input signal and using this to adjust a target common mode voltage at the output of the amplifier. This can help avoid the differential gain becoming modified by the common mode voltage.

A BGR circuit for sub-1V ICs utilizes a voltage chopping circuit and/or a current chopping circuit and a low-frequency filter to stabilize the output reference voltage that is generated by an op-amp, a current mirror circuit, a CTAT stage, a PTAT stage, and an output stage. The voltage chopping circuit reduces input offset and 1/f noise by periodically alternating (time-averaging) the negative temperature dependent and positive temperature dependent voltages supplied by the CTAT and PTAT stages to the op-amp's input terminals. The current chopping circuit minimizes current variations caused by process-related differences in the current mirror devices by periodically alternating (time-averaging) three balanced currents generated by the current mirror circuit such that each current is transmitted equally to each of the CTAT, PTAT and output stages. The filter serves to maintain loop stability and remove the low frequency noise generated by the applied voltage and/or current chopping operations.

An amplifier circuit a differential input stage coupled to a first input and to a second input between which a differential input voltage is present. A converter stage is coupled to the input stage to convert the differential input voltage into a converted voltage. An output stage is coupled to the converter stage and generates, starting from the converted voltage, an output voltage on a single output of the amplifier circuit. A biasing stage is coupled to the input stage and to the output stage to supply a biasing current. A chopper module reduces a contribution of offset and noise associated with the output voltage. The chopper module is coupled to the input stage, converter stage, and to the biasing stage. The chopper module includes an input chopper stage, a converter chopper stage, and a biasing chopper stage that operate jointly under control of a chopper signal.

An amplifier circuit a differential input stage coupled to a first input and to a second input between which a differential input voltage is present. A converter stage is coupled to the input stage to convert the differential input voltage into a converted voltage. An output stage is coupled to the converter stage and generates, starting from the converted voltage, an output voltage on a single output of the amplifier circuit. A biasing stage is coupled to the input stage and to the output stage to supply a biasing current. A chopper module reduces a contribution of offset and noise associated with the output voltage. The chopper module is coupled to the input stage, converter stage, and to the biasing stage. The chopper module includes an input chopper stage, a converter chopper stage, and a biasing chopper stage that operate jointly under control of a chopper signal.

The amplifier circuit includes a pair of differential input stages coupled to an output stage where both a selected input stage and an unselected input stage are active with one of either a differential input signal or a reference voltage. A switching network couples a first input differential signal to a first differential input stage and a reference voltage to a second differential input stage when an amplifier input signal is less than a threshold voltage. The switching circuit also couples the second input differential signal to the second differential input stage and the reference voltage to the first differential input stage when the amplifier input signal is greater than the threshold signal.

An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node, a phase controller that times even and odd phases, an input switch, and an output switch. The input switch electrically connects the mismatch reduction circuit input node to a first node of the pair of analog circuit input nodes during each even phase and to electrically connects the mismatch reduction circuit input node to a second node of the pair of analog circuit input nodes during each odd phase. The output switch electrically connects a first node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each even phase and electrically connects a second node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each odd phase.

An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node, a phase controller that times even and odd phases, an input switch, and an output switch. The input switch electrically connects the mismatch reduction circuit input node to a first node of the pair of analog circuit input nodes during each even phase and to electrically connects the mismatch reduction circuit input node to a second node of the pair of analog circuit input nodes during each odd phase. The output switch electrically connects a first node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each even phase and electrically connects a second node of the pair of analog circuit output nodes to the mismatch reduction circuit output node during each odd phase.

A high-voltage chopper-stabilized amplifier can include two paths to compensate for non-ideal electrical parameters. A first path, leading to a primary input of the amplifier, may include a first mux interface circuit to limit voltages at the primary input of the amplifier. A second path, leading to an auxiliary input of the amplifier, may include a chopper amplifier circuit. Despite the first mux interface circuit, a slew condition on the first path may excite a current in the second path that can negatively affect the signal source. Accordingly, the disclosed amplifier further includes a second mux interface circuit that can decouple the second path while a slew condition. The second mux interface circuit is driven by a window floating comparator, which is supplied according to the voltages on primary input. A settling enhancer circuit keeps, during slew condition, certain nodes on the second path at a reference voltage.

A high-voltage chopper-stabilized amplifier can include two paths to compensate for non-ideal electrical parameters. A first path, leading to a primary input of the amplifier, may include a first mux interface circuit to limit voltages at the primary input of the amplifier. A second path, leading to an auxiliary input of the amplifier, may include a chopper amplifier circuit. Despite the first mux interface circuit, a slew condition on the first path may excite a current in the second path that can negatively affect the signal source. Accordingly, the disclosed amplifier further includes a second mux interface circuit that can decouple the second path while a slew condition. The second mux interface circuit is driven by a window floating comparator, which is supplied according to the voltages on primary input. A settling enhancer circuit keeps, during slew condition, certain nodes on the second path at a reference voltage.