Patent classifications
H03F3/604
Doherty amplifier
Embodiments described herein relate to a Doherty amplifier. The Doherty amplifier may include a main amplifier and a first peak amplifier, a second peak amplifier, and a third peak amplifier, each amplifier having an input and an output. The Doherty amplifier may also include a combining network configured for combining signals emerging at outputs of the amplifiers. The signals are combined at a combining node. The combining network includes a first impedance inverter arranged in between the output of the main amplifier and the output of the third peak amplifier. The combining network also includes a second impedance inverter arranged in between the output of the first peak amplifier and the output of the second peak amplifier. The combining network also includes a first 180 degrees phase shifter and a second 180 degrees phase shifter. Additionally, the combining network includes a third impedance inverter.
ASYMMETRICAL PARALLEL-COMBINING (APC) TECHNIQUE FOR RF POWER AMPLIFIER
An integrated circuit RF power amplifier that includes a substrate; a low power (LP) amplifier; a high-power (HP) amplifier; and an asymmetrical parallel-combining transformer. The substrate is configured to supports the LP amplifier, the HP amplifier and the asymmetrical parallel-combining transformer. The LP amplifier is configured to amplify a LP RF input signal to provide a LP amplified signal. The HP amplifier is configured to amplify a HP RF input signal to provide a HP amplified signal. The HP amplified signal has maximal intensity that exceeds a maximal intensity of the LP amplified signal. The wherein the asymmetrical parallel-combining transformer may include (a) a HP primary winding that is constructed and arranged to receive the HP amplified signal; (b) LP primary windings that are constructed and arranged to receive the LP amplified signal; and (c) secondary windings that are magnetically coupled to the HP primary winding and to the LP primary windings, and are constructed and arranged to output a output signal.
Power transistor with harmonic control
A system and method for a packaged device with harmonic control are presented. In one embodiment, a device includes a substrate and a transistor die coupled to the substrate. The transistor die includes a plurality of transistor cells. Each transistor cell in the plurality of transistor cells includes a control (e.g., gate) terminal. The device includes a second die coupled to the substrate. The second die includes a plurality of individual shunt capacitors coupled between the control terminals of the plurality of transistor cells and a ground reference node. The capacitance values of at least two of the shunt capacitors are significantly different.
Multi-way power amplifier circuit
A multi-way power amplifier circuit includes two baluns and a number (2N) of differential power amplifiers, where N2. Each balun generates a number (N) of corresponding differential intermediate signal pairs based on a respective to-be-amplified signal. Each differential power amplifier generates a respective differential amplified signal pair based on a respective differential intermediate signal pair. One of the baluns includes: a first transmission line and a second transmission line connected to each other; a number (N) of third transmission lines electromagnetically coupled to the first transmission line; and a number (N) of fourth transmission lines electromagnetically coupled to the second transmission line.
Optimized multi-LNA solution for wideband auxiliary inputs supporting multiple bands
A high performance low noise amplifier integrated circuit having multiple low noise amplifiers enabling operation over a wide range for frequencies is disclosed. In particular, an auxiliary input is provided to the low noise amplifier integrated circuit that can be routed to one of several low noise amplifiers, each tuned to operate efficiently in different frequency ranges.
POWER AMPLIFIER HARMONIC MATCHING NETWORK
An output network connected to an output of a nonlinear unmatched power amplifier that provides an amplified voltage signal at a fundamental frequency. The output network includes multiple acoustic resonators configured to match multiple harmonic frequencies of the amplified voltage signal to one of substantially zero impedance, appearing as a short, or substantially infinite impedance, appearing as an open, resulting in zero voltage or zero current, respectively, to avoid power distribution at the higher harmonic frequencies. Each higher harmonic frequency is higher than a first harmonic frequency of the multiple harmonic frequencies, which is a fundamental frequency.
Power amplifier harmonic matching network
An output network connected to an output of a nonlinear unmatched power amplifier that provides an amplified voltage signal at a fundamental frequency. The output network includes multiple acoustic resonators configured to match multiple harmonic frequencies of the amplified voltage signal to one of substantially zero impedance, appearing as a short, or substantially infinite impedance, appearing as an open, resulting in zero voltage or zero current, respectively, to avoid power distribution at the higher harmonic frequencies. Each higher harmonic frequency is higher than a first harmonic frequency of the multiple harmonic frequencies, which is a fundamental frequency.
HIGH-POWER AMPLIFIER PACKAGE
Package assemblies for improving heat dissipation of high-power components in microwave circuits are described. A laminate that includes microwave circuitry may have cut-outs that allow high-power components to be mounted directly on a heat slug below the laminate. Electrical connections to circuitry on the laminate may be made with wire bonds. The packaging allows more flexible design and tuning of packaged microwave circuitry.
POWER RECONFIGURABLE POWER AMPLIFIER
Disclosed is a reconfigurable power amplifier having a 2.sup.N?1 number of input-side reconfigurable quadrature couplers connected in a tree structure, wherein a 2.sup.(N?1) number of the input-side reconfigurable quadrature couplers have coupler output terminals, and a root of the tree structure is one of the input-side reconfigurable quadrature couplers having a main input terminal. Also included is a 2.sup.N?1 number of output-side reconfigurable quadrature couplers connected in a tree structure, wherein a 2.sup.(N?1) number of the output-side reconfigurable quadrature couplers have coupler input terminals, and a root of the tree structure is one of the output-side reconfigurable quadrature couplers having a main output terminal. Further included is a 2.sup.N number of constituent amplifiers divided into amplifier pairs having amplifier input terminals connected to corresponding ones of the coupler output terminals and having amplifier output terminals coupled to corresponding ones of the coupler input terminals.
POWER AMPLIFIER APPARATUS, ENVELOPE TRACKING AMPLIFIER APPARATUS AND METHOD OF AMPLIFYING A SIGNAL
An amplifier apparatus (332) comprises a main linear amplifier sub-circuit (402) having a main driving signal input terminal (331) and a main amplifier output terminal (406). The apparatus also comprises an auxiliary linear amplifier sub-circuit (404) having an auxiliary driving signal input terminal (357) and an auxiliary amplifier output terminal (408). A combining network (410) is operably coupled between the main amplifier output terminal (406) and the auxiliary amplifier output terminal (408), the combining network (410) having a main-side terminal (424) and an auxiliary-side terminal (434). The main linear amplifier sub-circuit (402) is arranged to generate, when in use, a main amplified signal in response to a main driving signal applied at the main driving signal input terminal (331). The auxiliary linear amplifier sub-circuit (404) is arranged to generate, when in use, an impedance modifying signal at the auxiliary-side terminal (357) in response to an auxiliary driving signal and at substantially the same time as the main linear amplifier sub-circuit (402) generates the main amplified signal, the auxiliary linear amplifier sub-circuit (404) also being arranged to amplify substantially more than half of each wave cycle of the auxiliary driving signal.