A power amplifier cell (401) comprising: a first power amplifier (410), a second power amplifier (416) and a balun (422). The balun (422) comprising: a first transmission line (430); a second transmission line (432); a third transmission line (434); a fourth transmission line (436); and a biasing circuit (438) connected between (i) a reference terminal, and (ii) a second end of the second transmission line and a second end of the fourth transmission line.

The present disclosure relates to digital up-conversion for a multi-band Multi-Order Power Amplifier (MOPA) that enables precise and accurate control of gain, phase, and delay of multi-band split signals input to the multi-band MOPA. In general, a multi-band MOPA is configured to amplify a multi-band signal that is split across a number, N, of inputs of the multi-band MOPA as a number, N, of multi-band split signals, where N is an order of the multi-band MOPA and is greater than or equal to 2. A digital upconversion system for the multi-band MOPA is configured to independently control a gain, phase, and delay for each of a number, M, of frequency bands of the multi-band signal for each of at least N1, and preferably all, of the multi-band split signals.

In various embodiments, circuitry is provided. The circuitry may comprise: driver amplification circuitry, phase offset circuitry, balun circuitry, carrier amplifier circuitry, and peaking amplifier circuitry. The phase offset circuitry may comprise a first line connected to the driver amplification circuitry and configured to provide a first single-ended signal having a first phase delay. The phase offset circuitry may comprise a second line connected to the driver amplification circuitry and configured to provide a second single-ended signal having a second phase delay different from the first phase delay of the first single-ended signal of the first line. The balun circuitry may comprise first balun circuitry connected between the first line and the carrier amplifier circuitry, and second balun circuitry connected between the second line and the peaking amplifier circuitry.

An amplifier cell apparatus has an RF input node, a first power transistor in communication with the input node through a first input impedance matching network, a second power transistor in communication with the input node through a second input impedance matching network, and an RF output node in communication with the first and second power transistors through a single output impedance matching network so that the first and second input impedance matching networks are disposed on an RF input side of the amplifier cell.

Example embodiments relate to Doherty amplifiers. One example Doherty amplifier includes a main amplifier and a peak amplifier. The Doherty amplifier also includes a Doherty splitter configured for: splitting an input signal into a main signal part and a peak signal part and providing the main signal part and the peak signal part to the main amplifier and the peak amplifier, respectively. Additionally, the Doherty amplifier includes a Doherty combiner having a first input port, a second input port, and an output port. Further, the Doherty amplifier includes a non-impedance-inverting connection between an output of the main amplifier and the first input port. In addition, the Doherty amplifier includes a first impedance inverting network arranged in between an output of the peak amplifier and the second input port. Yet further, the Doherty combiner includes a second impedance inverting network and a third impedance inverting network.

A balanced radio frequency power amplifier, a front-end module, and a corresponding electronic device. The balanced radio frequency power amplifier comprises a driving-stage power unit (101, 201), an inter-stage power divider (102, 202), a main path power amplifier (103, 203), an auxiliary path power amplifier (104, 204), a first output matching network (A105, A205), a second output matching network (B106, B206), and an output power combiner (107, 207). A symmetrical balance design is used for the main path power amplifier (103, 203) and the auxiliary path power amplifier (104, 204), so that the impact of the change in the antenna voltage standing wave ratio (VSWR) on the transmission power and the transmitting efficiency is overcome to the greatest extent. Moreover, a 3 dB distributed orthogonal coupler is used for the inter-stage power divider (102, 202) and the output power combiner (107, 207).

A Doherty amplifier circuit includes a divider configured to divide a received input signal into a first signal and a second signal, a circuit board, a first amplifier amplifying the first signal and output the amplified first signal as a fourth signal, a second amplifier and amplifying the second signal and output the amplified second signal as a fifth signal, a combining node combining the fourth signal and the fifth signal into a combined signal and output the combined signal to an output terminal as an output signal, an open stub, the open stub having an end electrically connected to a path between the divider and the first amplifier, and a first impedance converter, the first impedance converter having a first end electrically connected to the second amplifier and a second end electrically connected to the combining node.

The present disclosure discloses a Doherty power amplifier, including: a quadrature coupler including a first coupled inductor and a second coupled inductor, the quadrature coupler being configured to split an input signal into a first signal and a second signal; a first amplifier circuit, configured to amplify the first signal; a second amplifier circuit, configured to amplify the second signal; and a load modulation network, which is an output voltage-combined Doherty load modulation network using a T equivalent model. An overlapping part of the coupled inductors is used to provide distributed parasitic capacitance, thereby eliminating the need to set an additional capacitor in the quadrature coupler, and therefore reducing an area. Through the T equivalent model, a quarter-wavelength transmission line is equated to the load modulation network of the embodiments of the present disclosure, multiple inductors are combined into transformers with small areas.

Doherty power amplifiers (DPAs), and related circuits, devices, systems and methods of operation, are disclosed herein. In an example embodiment, a system includes a first transistor device operable as a carrier amplifier, a second transistor device operable as a peaking amplifier, and at least one first integrated passive device (IPD) coupled between a combining node and each of carrier and peaking amplifier output ports. The system includes a first frequency-corrective network coupling the carrier amplifier output port with the node, where the network is formed at least in part by the at least one first IPD and is configured to operate as a first quasi-inverter network that includes a low-pass network. Additionally, the system includes a second frequency-corrective network coupling the peaking amplifier output port with the node, where the network is formed at least in part by the at least one first IPD and includes a bandpass network.

A power amplifier module includes a module substrate. First and second heat dissipation structures extend through the module substrate, and each has a first surface exposed at a mounting surface of the module substrate, and a second surface exposed at a bottom surface of the module substrate. The first surfaces of the first and second heat dissipation structures are physically separated by a portion of the mounting surface. First and second amplifier dies are coupled to the first surface of the first heat dissipation structure. The first amplifier die includes a first power transistor that functions as a driver amplifier. The second amplifier die includes a second power transistor that functions as a first final amplifier. The third amplifier die is coupled to the first surface of the second heat dissipation structure, and the third amplifier die includes a third power transistor that functions as a second final amplifier.