Various embodiments relate to a method and apparatus for maintaining constant gain in an open loop gain stage amplifier, the circuit including a reference signal generator configured to generate a plurality of reference voltages, a gain compensation circuit, including a reference selector configured to select one of the plurality of reference voltages for each of a plurality of gain stages, an error amplifier configured to output a control voltage signal to a selector, a selector configured to select which of a plurality of degeneration resistors in the open loop gain stage amplifier to apply the control voltage signal wherein the voltage signal is applied to the gate of at least one of the plurality of degeneration resistors in the open loop gain stage amplifier.

A circuit including an amplifier having an input and an output. The circuit also includes a current-to-voltage amplifier having an input. The circuit further includes a current mirror coupled between the output of the amplifier and the input of the current-to-voltage amplifier. The current mirror is configured to chop current flowing through the first current mirror.

Various embodiments relate to a method and apparatus for maintaining constant gain in an open loop gain stage amplifier, the circuit including a reference signal generator configured to generate a plurality of reference voltages, a gain compensation circuit, including a reference selector configured to select one of the plurality of reference voltages for each of a plurality of gain stages, an error amplifier configured to output a control voltage signal to a selector, a selector configured to select which of a plurality of degeneration resistors in the open loop gain stage amplifier to apply the control voltage signal wherein the voltage signal is applied to the gate of at least one of the plurality of degeneration resistors in the open loop gain stage amplifier.

A receiving circuit and method for increasing bandwidth are provided. The receiving circuit includes a linear equalizer circuit and a variable gain amplifier. The linear equalizer circuit includes a first negative impedance converter, to generate a first capacitance. The variable gain amplifier is coupled to the linear equalizer circuit. The variable gain amplifier includes a first-stage gain circuit and a feedback circuit. The first-stage gain circuit is coupled to the feedback circuit, and the feedback circuit generates a zero-point at the output end of the first-stage gain circuit.

The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.

A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.

An integrated circuit RF power amplifier that includes a substrate; a low power (LP) amplifier; a high-power (HP) amplifier; and an asymmetrical parallel-combining transformer. The substrate is configured to supports the LP amplifier, the HP amplifier and the asymmetrical parallel-combining transformer. The LP amplifier is configured to amplify a LP RF input signal to provide a LP amplified signal. The HP amplifier is configured to amplify a HP RF input signal to provide a HP amplified signal. The HP amplified signal has maximal intensity that exceeds a maximal intensity of the LP amplified signal. The wherein the asymmetrical parallel-combining transformer may include (a) a HP primary winding that is constructed and arranged to receive the HP amplified signal; (b) LP primary windings that are constructed and arranged to receive the LP amplified signal; and (c) secondary windings that are magnetically coupled to the HP primary winding and to the LP primary windings, and are constructed and arranged to output a output signal.

Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.

A multi-gain LNA with inductive source degeneration is presented. The inductive source degeneration is provided via a tunable degeneration network that includes an inductor in parallel with one or more switchable shunting networks. Each shunting network includes a shunting capacitor that can selectively be coupled in parallel to the inductor. A capacitance of the shunting capacitor is calculated so that a combined impedance of the inductor and the shunting capacitor at a narrowband frequency of operation is effectively an inductance. The inductance is calculated according to a desired gain of the LNA. According to one aspect, the switchable shunting network includes a resistor in series connection with the shunting capacitor to provide broadband frequency response stability of the tunable degeneration network. According to another aspect, the LNA includes a plurality of selectable branches to further control gain of the LNA.

A dynamic amplifier includes a first output capacitor, a first switch, a current source, a second switch, a voltage detector, a third switch and a level shifter. The first switch is coupled between a first terminal of the first output capacitor and a voltage detection node. The second switch is coupled to the current source and the voltage detection node. The voltage detector is coupled to the voltage detection node and the first switch. The third switch is coupled between the voltage detection node and a power source. The level shifter is coupled to a second terminal of the first output capacitor.