Patent classifications
H03G1/0029
Image signal transmission apparatus and signal output circuit applying bandwidth broadening mechanism thereof
The present invention discloses a signal output circuit applying bandwidth broadening mechanism for an image signal transmission apparatus that includes a first driving circuit and a second driving circuit. The first driving circuit includes a continuous time linear equalizer (CTLE) and is configured to receive a digital input signal to perform a high frequency enhancement thereon to increase a bandwidth of the digital input signal to generate a first output signal, in which a zero point and two poles of a frequency response of the first driving circuit are determined by circuit parameters thereof. The second driving circuit is configured to receive and amplify the first output signal to generate a second output signal for an image receiving apparatus.
Reference generation circuit for maintaining temperature-tracked linearity in amplifier with adjustable high-frequency gain
Equalizing an input signal according to a receiver equalizer peaking circuit having a capacitor FET (CFET) providing a capacitive value and a resistor FET (RFET) providing a resistive value, generating a capacitor control voltage at a gate of the CFET using a capacitor controller DAC based on a first reference voltage, and a RFET control voltage at a gate of the RFET using a resistor controller DAC based on a second reference voltage, generating the first reference voltage using a replica input FET, the first reference voltage varying according to a threshold voltage (Vt) of an input FET, providing the first reference voltage to the capacitor controller DAC, generating the second reference voltage using a replica RFET, the second reference voltage varying with respect to the first reference voltage and a Vt of the replica of the RFET, and providing the second reference voltage to the resistor controller DAC.
MEASUREMENT CIRCUIT FOR ISOLATION PRODUCT
A method for measuring a received signal includes receiving a differential pair of signals by a differential pair of input nodes of a differential circuit. The method includes attempting to match a first current through a first node of the differential circuit corresponding to the differential pair of signals to a second current through a second node of the differential circuit corresponding to a feedback signal. The method includes generating an output measurement signal based on the first current and the second current. The output measurement signal has a level corresponding to an average amplitude of the differential pair of signals.
GAIN STAGE DEGENERATION INDUCTOR SWITCHING WITHOUT THE USE OF SWITCHES
Disclosed herein are signal amplifier architectures that provide a plurality of gain modes. Different gain modes can use different paths through the amplifier architecture. Switches that are used to select the path through the amplifier architecture can be configured to also provide targeted impedance in a degeneration block or matrix. The switches that select the gain path are provided in the amplifier architecture and are thus not needed or used in the degeneration block, thereby reducing the size of the package for the amplifier architecture, improving the noise figure (NF), improving impedance matching, and eliminating the need for control logic associated with the degeneration block or matrix.
AMPLIFIER AND RECEIVING CIRCUIT, SEMICONDUCTOR APPARATUS, AND SEMICONDUCTOR SYSTEM USING THE SAME
An amplifier includes an amplification circuit, an equalization circuit, an output circuit, a first gain adjusting circuit, and a second gain adjusting circuit. The amplification circuit changes voltage levels of first and second amplification nodes based on first and second input signals. The equalization circuit changes the voltage levels of the first and second amplification nodes. The output circuit generates an output signal based on the voltage levels of the first and second amplification nodes. The first gain adjusting circuit changes voltage levels applied to the first and second amplification nodes based on the voltage levels of the first and second amplification nodes and a first gain control signal. The second gain adjusting circuit changes a voltage level of the output signal based on a second gain control signal.
Low noise amplifier circuit having multiple gains
A low noise amplifier circuit includes an input stage circuit, a first output stage circuit, and a second output stage circuit. The input stage circuit is configured to receive an input signal and to generate a bias signal. The first output stage circuit corresponding to a first wireless communication and is configured to be biased according to the bias signal and a first control signal, in order to generate a first output signal, in which the first control signal is for setting a first gain of the first output stage circuit. The second output stage circuit corresponding to a second wireless communication and is configured to be biased according to the bias signal and a second control signal, in order to generate a second output signal, in which the second control signal is for setting a second gain of the second output stage circuit.
MEASUREMENT CIRCUIT FOR ISOLATION PRODUCT
A method includes generating a first current through a first node based on a differential pair of signals received by a differential pair of input nodes of a differential circuit of a first integrated circuit die of an isolator product. The method includes generating a second current through a second node. The second current matches the first current through the first node and is based on an attenuated version of an output measurement signal. The method includes generating the output measurement signal having a level corresponding to an average amplitude of the differential pair of signals based on the first current and the second current.
PEAK AND GAIN CALIBRATION OF A RECEIVER IN AN ISOLATION PRODUCT
A method for calibrating a receiver of an isolator product includes adjusting a peaking frequency of a receiver signal path of a first integrated circuit die of the isolator product and a gain of the receiver signal path based on a predetermined peaking frequency, a predetermined gain, a first level of a diagnostic signal during a first interval, and a second level of the diagnostic signal during a second interval. The first interval and the second interval are non-overlapping intervals. The method may include receiving a calibration signal on a differential pair of nodes of the receiver signal path of the first integrated circuit die. The method may include generating a diagnostic signal corresponding to an average amplitude of a received version of the calibration signal.
MEASUREMENT AND CALIBRATION OF MISMATCH IN AN ISOLATION CHANNEL
A method for calibrating an isolator product includes receiving a calibration signal on a differential pair of nodes of a receiver signal path of a first integrated circuit die of the isolator product. The method includes generating a diagnostic signal having a level corresponding to an average amplitude of the calibration signal on the differential pair of nodes. The method includes configuring a programmable receiver signal path based on the diagnostic signal. Generating the diagnostic signal may include providing an analog signal based on a full-wave rectified version of the calibration signal on the differential pair of nodes. Generating the diagnostic signal may include converting the analog signal to a digital signal.
Variable gain amplifiers with cross-couple switching arrangements
An example VGA includes a transistor arrangement having a plurality of transistors configured to realize one or more gain step circuits of the VGA, and a cross-couple switching arrangement having a plurality of switches configured to selectively change the coupling of the terminals of at least some of the transistors depending on whether a given gain step circuit is supposed to be in an ON state or in an OFF state. Using the cross-couple switching arrangement advantageously allows keeping all of the transistors ON at all times during operation and changing the coupling of some transistor terminals to either realize an in-phase addition of currents flowing through various transistors to apply the maximum gain or realize a subtraction of currents to apply the minimum gain. Such a VGA may be inherently wideband, enabling a highly linear, wideband operation without having to resort to significant trade-offs with other performance parameters.