Patent classifications
H03G1/0082
Optical modulator driver circuit and optical transmitter
- Munehiko Nagatani ,
- Hideyuki Nosaka ,
- Toshihiro Itoh ,
- Koichi Murata ,
- Hiroyuki Fukuyama ,
- Takashi Saida ,
- Shin Kamei ,
- Hiroshi Yamazaki ,
- Nobuhiro Kikuchi ,
- Hiroshi KOIZUMI ,
- Masafumi Nogawa ,
- Hiroaki Katsurai ,
- Hiroyuki UZAWA ,
- Tomoyoshi Kataoka ,
- Naoki Fujiwara ,
- Hiroto KAWAKAMI ,
- Kengo Horikoshi ,
- Yves Bouvier ,
- Mikio Yoneyama ,
- Shigeki Aisawa ,
- Masahiro Suzuki
An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.
PLURAL FEEDBACK LOOPS INSTRUMENTATION FOLDED CASCODE AMPLIFIER
An instrumentation amplifier configured for providing high common mode rejection is described and includes an input differential stage configured to receive a differential input voltage and a folded cascode amplifying stage configured to receive output current mode signals provided from the input differential pair. A plurality of feedback networks is provided to improve the input stage. The amplifier may operate to provide an enhanced common mode rejection ratio of a single gain block in the instrumentation amplifier. In some examples, the circuitry may have a differential folded cascode amplifying stage which permits high precision and low distortion of amplified signals without degrading the common mode rejection ratio.
POWER AMPLIFIER CIRCUIT
A power amplifier circuit includes a transistor, a bias current source, and an adjustment circuit. The transistor amplifies an RF signal when supplied with a variable power supply voltage. The bias current source supplies a bias current to the base of the transistor through a first current path. The adjustment circuit increases a current flowing from the bias current source to an input terminal of a matching circuit through a second current path as the variable power supply voltage decreases, and decreases the bias current flowing from the bias current source to the base of the transistor through the first current path as the current flowing from the bias current source to the input terminal through the second current path increases.
BANDGAP REFERENCE CIRCUIT AND SENSOR CHIP USING THE SAME
A bandgap reference circuit including a clamp circuit is provided. The bandgap reference circuit performs the calibration only for one time in a normal mode to store a control code of a reference generator of the clamp circuit. In a suspend mode, the control code is used for controlling the reference generator to cause the clamp circuit to provide a desired source voltage, and a bandgap reference voltage source is shut down to reduce the power consumption.
Plural feedback loops instrumentation folded cascode amplifier
An instrumentation amplifier configured for providing high common mode rejection is described and includes an input differential stage configured to receive a differential input voltage and a folded cascode amplifying stage configured to receive output current mode signals provided from the input differential pair. A plurality of feedback networks is provided to improve the input stage. The amplifier may operate to provide an enhanced common mode rejection ratio of a single gain block in the instrumentation amplifier. In some examples, the circuitry may have a differential folded cascode amplifying stage which permits high precision and low distortion of amplified signals without degrading the common mode rejection ratio.
Programmable impedance network in an amplifier
The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input. A second transistor receives a second input. A plurality of impedance networks is coupled between the first transistor and the second transistor. At least one impedance network of the plurality of impedance networks includes a first impedance path and a second impedance path. The first impedance path is activated during single ended operation, and the second impedance path is activated during differential operation.
Variable gain amplifier and driver implementing the same
A driver that drives an optical device, such as laser diode (LD) and/or optical modulator, is disclosed. The driver includes a variable gain amplifier (VGA) and a post amplifier. The post amplifier amplifies an output of the VGA to a preset amplifier as varying the gain of the VGA. The VGA includes two differential pairs each amplify the input signal oppositely in phases thereof and outputs of the differential pairs are compositely provided to the post amplifier. The gain of the VGA is varied by adjusting contribution of the second differential pair to the output of the VGA.
Variable gain amplifier with stable frequency response
A variable gain amplifier having stabilized frequency response for widened gain control range. A resistor-capacitor compensation network is provided between two differential current input ports and corresponding emitter nodes of cross-coupled four transistors in the variable gain amplifier to desensitize the gain control voltages to the system noise and provide compensation to the VGA frequency response when the differential gain control voltage varies the gain setting, yielding a substantially stabilized frequency response over a 3 dB bandwidth ranging from 1 GHz to 60 GHz with a widened gain control range up to 12 dB without increasing power consumption.
Low-voltage low-power variable gain amplifier
In high speed communication applications, e.g., optical communication, a variable gain amplifier is used for input signal amplitude normalization or for linear equalization. Traditionally a bipolar Gilbert multiplier circuit is used. When moving towards a low-power application, a modified circuit topology is implemented to reduce the minimum supply voltage requirement of the variable gain amplifier while ensuring that bias current levels remain substantially the same and achieving the same current switching capacity as the traditional circuit. As a result, the power consumption of the circuit can be greatly reduced. The modified circuit topology combines the amplifier and gain transistors and achieves gain programming using a voltage difference of two pairs of floating voltage sources.
LOW-VOLTAGE LOW-POWER VARIABLE GAIN AMPLIFIER
In high speed communication applications, e.g., optical communication, a variable gain amplifier is used for input signal amplitude normalization or for linear equalization. Traditionally a bipolar Gilbert multiplier circuit is used. When moving towards a low-power application, a modified circuit topology is implemented to reduce the minimum supply voltage requirement of the variable gain amplifier while ensuring that bias current levels remain substantially the same and achieving the same current switching capacity as the traditional circuit. As a result, the power consumption of the circuit can be greatly reduced. The modified circuit topology combines the amplifier and gain transistors and achieves gain programming using a voltage difference of two pairs of floating voltage sources.