H03G3/3036

High-linearity variable gain amplifier and electronic apparatus

A variable gain amplifier and an electronic apparatus. The variable gain amplifier includes a first transconductance stage circuit and a second transconductance stage circuit, where the first transconductance stage circuit includes a first amplifying circuit and a second amplifying circuit, the second transconductance stage circuit includes a third amplifying circuit and a fourth amplifying circuit, the first amplifying circuit and the fourth amplifying circuit form a differential input pair, and the second amplifying circuit and the third amplifying circuit form a differential input pair, and where each amplifying circuit of the first amplifying circuit, the second amplifying circuit, the third amplifying circuit, and the fourth amplifying circuit includes a plurality of parallel transistors, and bias control of the plurality of transistors is independent of each other.

Radio receiver having enhanced automatic gain control circuitry
09735748 · 2017-08-15 · ·

An apparatus includes an input terminal to receive a radio frequency (RF) signal and to communicate the RF signal to a low noise amplifier (LNA) via an input signal path, and a capacitor attenuator coupled to the input terminal to attenuate the RF signal by a controllable amount and having a first portion controllable to include a used part configured on the input signal path and an unused part coupled between the input signal path and an AC reference node, and a second portion coupled between the LNA and the AC reference node.

Method and structure for controlling bandwidth and peaking over gain in a variable gain amplifier (VGA)
11431309 · 2022-08-30 · ·

A method of controlling bandwidth and peaking over gain in a variable gain amplifier (VGA) device and structure therefor. The device includes at least three differential transistor pairs configured as a cross-coupled differential amplifier with differential input nodes, differential bias nodes, differential output nodes, a current source node, and two cross-coupling nodes. The cross-coupled differential amplifier includes a load resistor coupled to each of the differential output nodes and one of the cross-coupling nodes, and a load inductor coupled to the each of the cross-coupling nodes and a power supply rail. A current source is electrically coupled to the current source node. The cross-coupling configuration with the load resistance and inductance results in a lower bandwidth and lowered peaking at low gain compared to high gain. Further, the tap point into the inductor can be chosen as another variable to “tune” the bandwidth and peaking in a communication system.

LOW VOLTAGE VARIABLE GAIN AMPLIFIER WITH LOW PHASE SENSITIVITY
20220311404 · 2022-09-29 ·

Technologies are provided for variable gain amplifiers (VGAs). An example VGA includes a resistor ladder including resistor legs coupled to first and second resistors; first differential switches connected to the resistor ladder and second differential switches connected to output nodes, a transistor in each of the first differential switches being coupled to an first electrical line interconnecting the first resistors and a different transistor in each of the first differential switches being coupled to a second electrical line interconnecting the second resistors; third differential switches connected to the resistor ladder and fourth differential switches connected to the output nodes, a transistor in each of the third differential switches being coupled to the first electrical line and a different transistor in each of the fourth differential switches being coupled to the second electrical line; and a pair of transistors respectively connected to the first differential switches and the third differential switches.

SYSTEMS AND METHODS FOR LINEAR VARIABLE GAIN AMPLIFIER

The present invention is directed to electrical circuits. In a specific embodiment, the present invention provides variable gain amplifier that includes an impedance ladder and a control circuit. The impedance ladder includes n switches configured in parallel. The control circuit includes a digital-to-analog converter and an amplifier. The control circuit generates n control signals for the n switches. There are other embodiments as well.

AUTOMATIC GAIN CONTROL METHOD AND AUTOMATIC GAIN CONTROL CIRCUIT

This automatic gain control circuit is provided with a variable gain amplifier for amplifying a received signal, has a small circuit size, and makes it possible to reduce the effect of superimposed external noise input within the frequency bandwidth of a received signal. The automatic gain control circuit supplies the output of the variable gain amplifier to an analog/digital converter and comprises: a frequency selection circuit that is connected to the output of the analog/digital converter and that selects a signal within the frequency bandwidth of a received signal, said signal having a narrower bandwidth than the frequency bandwidth; and a control signal generation circuit that generates a control signal for the variable gain amplifier on the basis of the strength of the signal selected by the frequency selection circuit.

Automatic gain control for received signal strength indication

In some implementations, an automatic gain control (AGC) circuit comprises: a pre-divider circuit operable to pre-divide an input signal according to a pre-divider circuit setting and output a pre-divided signal; a pre-amplifier operable to pre-amplify the pre-divided signal and output a pre-amplified signal; a post-divider circuit operable to post-divide the pre-amplified signal according to a post-divider circuit setting; an analog-to-digital converter (ADC) operable to generate a digital data stream from the post-divided signal; logic operable to sample the digital data stream; determine a pre-divider circuit setting and a post-divider circuit setting based on the sampled data stream; set the pre-divider circuit and the post-divider circuit based on the determined settings; and generate a received signal strength value based on the pre-divider circuit setting and the post-divider circuit setting.

Emphasis circuit

Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.

Circuit arrangement and method for attenuation compensation in an antenna signal link
20170324431 · 2017-11-09 ·

A circuit arrangement for compensating for an attenuation occurring in an antenna signal link between a mobile radio terminal and an antenna has at least one antenna signal amplifier in the antenna signal link and a control unit for adjusting a gain factor. The antenna signal conducted through an associated antenna signal amplifier is amplified or attenuated. The circuit arrangement has a detection unit for detecting an antenna signal power (P.sub.M, P.sub.A) of the antenna signal in the signal path of the antenna signal link. The control unit is configured for changing the gain factor, detecting a change, changing the transmit power (P.sub.M) of the mobile radio terminal, and adapting the gain factor to the coupling attenuation of the antenna signal link in dependence on a detected response of the mobile radio terminal.

Method and apparatus for automatic gain control

The embodiments disclose a method and apparatus for automatic gain control. The apparatus comprises a first gain controlled element, a second gain controlled element, a first gain control device, a second gain control device and a first simulator. The first gain controlled element and the second gain controlled element each has a signal input, a gain control input and a signal output. The first gain controlled element and the second gain controlled element are coupled in series and one or more power elements coupled between the first gain controlled element and the second gain controlled element. The signal input of the first gain controlled element constitutes an input of the automatic gain control apparatus. The first gain control device has a pre-detection input which is coupled to the signal input of the first gain controlled element and an output which drives the gain control input of the first gain controlled element. The second gain control device has a pre-detection input and an output which drives the gain control input of the second gain controlled element. The first simulator is coupled between the signal input of the first gain controlled element and the pre-detection input of the second gain control device, which is used to simulate frequency response of the one or more power elements between the first gain controlled element and the second gain controlled element, such that a signal received by the pre-detection input of the second gain control device is matched with a signal received by the signal input of the second gain controlled element.