Patent classifications
H03H11/30
IMPEDANCE MATCHING NETWORK AND METHOD
In one embodiment, an impedance matching network includes variable capacitors. A first variable capacitor has a terminal electrically connected to the RF input. A second variable capacitor has a terminal electrically connected to the RF output. At least one of the variable capacitors is an electrically variable capacitor (EVC). The EVC includes a plurality of parallel-coupled capacitors comprising fine capacitors increasing in capacitance and coarse capacitors having a greater capacitance. A capacitor position for the EVC for enabling an impedance match is determined by a processor using software. An impedance match is enabled by directly switching the electronically variable capacitor to the determined capacitor position.
IMPEDANCE MATCHING NETWORK AND METHOD
In one embodiment, an impedance matching network includes variable capacitors. A first variable capacitor has a terminal electrically connected to the RF input. A second variable capacitor has a terminal electrically connected to the RF output. At least one of the variable capacitors is an electrically variable capacitor (EVC). The EVC includes a plurality of parallel-coupled capacitors comprising fine capacitors increasing in capacitance and coarse capacitors having a greater capacitance. A capacitor position for the EVC for enabling an impedance match is determined by a processor using software. An impedance match is enabled by directly switching the electronically variable capacitor to the determined capacitor position.
Impedance Matching Device and Impedance Matching Method
An impedance matching device includes: a variable capacitor in which a plurality of series circuits of capacitors and semiconductor switches are connected in parallel; a calculation unit that calculates an impedance or a reflection coefficient on the load side using information regarding impedance acquired from the outside; and a control unit that determines ON/OFF states to be taken by the semiconductor switches included in the variable capacitor using the impedance or the reflection coefficient calculated by the calculation unit and turns on or off the semiconductor switches based on the determined states. The control unit changes an ON/OFF control timing between one and another of the semiconductor switches.
Impedance Matching Device and Impedance Matching Method
An impedance matching device includes: a variable capacitor in which a plurality of series circuits of capacitors and semiconductor switches are connected in parallel; a calculation unit that calculates an impedance or a reflection coefficient on the load side using information regarding impedance acquired from the outside; and a control unit that determines ON/OFF states to be taken by the semiconductor switches included in the variable capacitor using the impedance or the reflection coefficient calculated by the calculation unit and turns on or off the semiconductor switches based on the determined states. The control unit changes an ON/OFF control timing between one and another of the semiconductor switches.
Hybrid matching network topology
The present disclosure relates to plasma generation systems which utilize plasma for semiconductor processing. The plasma generation system disclosed herein employs a hybrid matching network. The plasma generation system includes a RF generator and a matching network. The matching network includes a first-stage to perform low-Q impedance transformations during high-speed variations in impedance. The matching network includes a second-stage to perform impedance matching for high-Q impedance transformations. The matching network further includes a sensor coupled to the first-stage and the second-stage to calculate the signals that are used to engage the first and second-stages. The matching network includes a first-stage network that is agile enough to tune each state in a modulated RF waveform and a second-stage network to tune a single state in a RF modulated waveform. The plasma generation system also includes a plasma chamber coupled to the matching network.
Hybrid matching network topology
The present disclosure relates to plasma generation systems which utilize plasma for semiconductor processing. The plasma generation system disclosed herein employs a hybrid matching network. The plasma generation system includes a RF generator and a matching network. The matching network includes a first-stage to perform low-Q impedance transformations during high-speed variations in impedance. The matching network includes a second-stage to perform impedance matching for high-Q impedance transformations. The matching network further includes a sensor coupled to the first-stage and the second-stage to calculate the signals that are used to engage the first and second-stages. The matching network includes a first-stage network that is agile enough to tune each state in a modulated RF waveform and a second-stage network to tune a single state in a RF modulated waveform. The plasma generation system also includes a plasma chamber coupled to the matching network.
Impedance Adjustment Device and Impedance Adjustment Method
A high frequency power supply alternately outputs a first AC voltage and a second AC voltage to a plasma generator. The amplitudes of the first AC voltage and the second AC voltage are different from each other. An impedance adjustment device is disposed in midway of the transmission line of the first AC voltage and the second AC voltage. When the AC voltage output from the high frequency power supply is switched to a first AC voltage, a microcomputer changes the capacitance of a variable capacitor circuit to a first target value. When the AC voltage output from the high frequency power supply is switched to a second AC voltage, the microcomputer changes the capacitance of the variable capacitor circuit to a second target value.
Impedance Adjustment Device and Impedance Adjustment Method
A high frequency power supply alternately outputs a first AC voltage and a second AC voltage to a plasma generator. The amplitudes of the first AC voltage and the second AC voltage are different from each other. An impedance adjustment device is disposed in midway of the transmission line of the first AC voltage and the second AC voltage. When the AC voltage output from the high frequency power supply is switched to a first AC voltage, a microcomputer changes the capacitance of a variable capacitor circuit to a first target value. When the AC voltage output from the high frequency power supply is switched to a second AC voltage, the microcomputer changes the capacitance of the variable capacitor circuit to a second target value.
Impedance matching device and impedance matching method
An impedance matching device includes: a variable capacitor in which a plurality of series circuits of capacitors and semiconductor switches are connected in parallel; a calculation unit that calculates an impedance or a reflection coefficient on the load side using information regarding impedance acquired from the outside; and a control unit that determines ON/OFF states to be taken by the semiconductor switches included in the variable capacitor using the impedance or the reflection coefficient calculated by the calculation unit and turns on or off the semiconductor switches based on the determined states. The control unit changes an ON/OFF control timing between one and another of the semiconductor switches.
Impedance matching device and impedance matching method
An impedance matching device includes: a variable capacitor in which a plurality of series circuits of capacitors and semiconductor switches are connected in parallel; a calculation unit that calculates an impedance or a reflection coefficient on the load side using information regarding impedance acquired from the outside; and a control unit that determines ON/OFF states to be taken by the semiconductor switches included in the variable capacitor using the impedance or the reflection coefficient calculated by the calculation unit and turns on or off the semiconductor switches based on the determined states. The control unit changes an ON/OFF control timing between one and another of the semiconductor switches.