Patent classifications
H03H2017/0247
Method for equivalent high sampling rate FIR filtering based on FPGA
The present invention provides a method for equivalent high sampling rate FIR filtering based on FPGA, first, the coefficients h(k) of FIR filter are found by using MATLAB, multiplied by an integer and then rounded for the purpose that the rounded coefficients h(k) can be directly used into a FPGA, then the ADC's output of high data rate fs is lowered by dividing the ADC's output x(n) into M parallel data streams xi(n) of low data rate, and the M×L samples in one clock cycle is obtained by delaying the M parallel data streams xi(n) simultaneously by 1, 2, . . . , L′ periods of the synchronous clock, at last, the samples yi(n) of FIR filtering output is calculated according to the samples selected from the M×L samples, and the filtered data y(n) of data rate fs is obtained by putting the samples yi(n) together in ascending order of i. Thus, the continuous FIR filtering of an ADC's output sampled with high sampling rate is realized, while the data rates before and after the FIR filtering are unchanged.
METHOD FOR FILTERING WITH ZERO LATENCY AND ASSOCIATED DEVICES
The invention relates to a method for filtering a numerical input signal sampled at a sampling frequency in order to obtain a filtered signal, the method including at least one step for: obtaining a first (respectively second) output signal by carrying out first (respectively second) operations on the first (respectively second) processing channel, the first (respectively second) operations including at least the application of a discrete Fourier transform to M/2.sup.p points on a signal coming from the input signal, the integer p being greater than or equal to 1, applying an inverse discrete Fourier transform to M/2.sup.p points on the first signal in order to obtain M points of the spectrum of the first signal, M being an integer strictly greater than 2, the application step being carried out by the addition of the results of two processing channels.
METHOD FOR SIMPLIFYING A FILTER AND ASSOCIATED DEVICES
The invention relates to a method for simplifying a sampled signal digital filter, the method including at least one step for: in order to obtain a first intermediate filter, gathering channels including discrete nonstationary operations relating to the same signal, the first channels including the nonstationary operations relating to a first signal and the second channels including the nonstationary operations relating to a second signal, in order to obtain a second intermediate filter, on each of the first channels and second channels, commutative stationary operations with the nonstationary operations, in order to eliminate the redundant nonstationary operations, and building the filter corresponding to the last obtained intermediate filter.
METHOD FOR FILTERING WITH REDUCED LATENCY AND ASSOCIATED DEVICES
The invention relates to a method for filtering a numerical input signal sampled at a sampling frequency in order to obtain a filtered signal, the method including at least one step for: obtaining a first (respectively second) output signal by carrying out first (respectively second) operations on the first (respectively second) processing channel, the first (respectively second) operations including at least the application of a discrete Fourier transform to M/2 points on a signal coming from the input signal, applying an inverse discrete Fourier transform to M/2 points on the first signal in order to obtain M points of the spectrum of the first signal, M being an integer strictly greater than 2, the application step being carried out by the addition of the results of two processing channels.
Parallel filtering of large time series of data for filters having recursive dependencies
Filtering apparatus and methods associated with filtering large time series of data are described. A filtering process containing recursive dependencies can be organized as a series of computational tasks, at least some of which can be performed in parallel. Because of parallel execution of some tasks, an amount of time for filtering large time series of data with a filter exhibiting recursive data dependencies can be reduced significantly.
PARALLEL FILTERING OF LARGE TIME SERIES OF DATA FOR FILTERS HAVING RECURSIVE DEPENDENCIES
Filtering apparatus and methods associated with filtering large time series of data are described. A filtering process containing recursive dependencies can be organized as a series of computational tasks, at least some of which can be performed in parallel. Because of parallel execution of some tasks, an amount of time for filtering large time series of data with a filter exhibiting recursive data dependencies can be reduced significantly.
High-rate decimation filter with low hardware complexity
A Finite Impulse Response (FIR) filter that reduces the complexity of the hardware required for a filter with a high decimation factor while achieving similar performance of prior art poly-phase filters of greater complexity. The FIR filter includes a small number of multiply-and-accumulate (MAC) units connected in parallel to each other between an input stream and an output stream. The MAC units are provided with coefficients from a memory. In an example implementation, the memory is addressed by a counter and the output of the memory selected by a multiplexer for suppling the coefficients.
METHOD FOR EQUIVALENT HIGH SAMPLING RATE FIR FILTERING BASED ON FPGA
The present invention provides a method for equivalent high sampling rate FIR filtering based on FPGA, first, the coefficients h(k) of FIR filter are found by using MATLAB, multiplied by an integer and then rounded for the purpose that the rounded coefficients h(k) can be directly used into a FPGA, then the ADC's output of high data rate f.sub.s is lowered by dividing the ADC's output x(n) into M parallel data streams x.sub.i(n) of low data rate, and the ML samples in one clock circle is obtained by delaying the M parallel data streams x.sub.i(n) simultaneously by 1, 2, . . . , L periods of the synchronous clock, at last, the samples y.sub.i(n) of FIR filtering output is calculated according to the samples selected from the ML samples, and the filtered data y(n) of data rate f.sub.s is obtained by putting the samples y.sub.i(n) together in ascending order of i. Thus, the continuous FIR filtering of an ADC's output sampled with high sampling rate is realized, while the data rates before and after the FIR filtering are unchanged.
Digital frequency converter and method of processing in a digital frequency converter
A frequency converter comprising a frequency transposition block for samples (11.sub.Q.sub._.sub.1, 11.sub.Q.sub._.sub.2), a filtering block (12.sub.Q.sub._.sub.1, 12.sub.Q.sub._.sub.2), the filtered samples y(n) verifying y(n)=c(0).Math.x(n)+c(1).Math.x(n1)+c(2).Math.x(n2)+ . . . +c(p1).Math.x(np+1)+c(p).Math.x(np)+c(p1).Math.x(np1)+ . . . + . . . +c(1).Math.x(n2.Math.p+1)+c(0).Math.x(n2.Math.p), wherein x( ) are the transposed samples and c(0), . . . c(p) are the real coefficients of the filter; and being adapted for, during a cycle for determining the value of the filtered sample y(n): calculating the first terms c(0).Math.x(n), c(1).Math.x(n1), c(2).Math.x(n2), . . . , c(p).Math.x(np) by multiplying the respective coefficients and transposed samples, and storing in memory said first calculated terms; reading the second terms c(p1).Math.x(np1), . . . , c(1).Math.x(n2.Math.p+1), c(0).Math.x(n2.Math.p), calculated and stored in memory during previous cycles for determining the value of filtered samples y(nm); and determining y(n) by summation of the first and second terms.
Method for filtering with reduced latency and associated devices
The invention relates to a method for filtering a numerical input signal sampled at a sampling frequency in order to obtain a filtered signal, the method being performed by a radar system and including at least one step for obtaining a first (respectively second) output signal by carrying out first (respectively second) operations on the first (respectively second) processing channel, the first (respectively second) operations including at least the application of a discrete Fourier transform to M/2 points on a signal coming from the input signal, and applying an inverse discrete Fourier transform to M/2 points on the first signal in order to obtain M points of the spectrum of the first signal, M being an integer strictly greater than 2, the application step being carried out by the addition of the results of two processing channels.