Patent classifications
H03J3/08
Circuits for switched capacitor receiver front-ends
Switched capacitor radio frequency receiver front-ends are provided, comprising: a plurality of banks, each comprising: a first switch connected to a RF input signal; a sampling capacitor connected to the first switch and to ground; a second switch connected in parallel to the sampling capacitor; and a Gm cell coupled to the sampling capacitor and an output; wherein: the output of the Gm cell of each of the plurality on banks are coupled together; and the first switch and the second switch are controlled by a multi-phase signal that causes, for each of the plurality of banks, the first switch to be turned ON at a first point in time and the second switch to be turned ON at a second point in time, wherein the first point in time for a first bank is not the same as the first point in time for a second bank.
CIRCUITS FOR SWITCHED CAPACITOR RECEIVER FRONT-ENDS
Switched capacitor radio frequency receiver front-ends are provided, comprising: a plurality of banks, each comprising: a first switch connected to a RF input signal; a sampling capacitor connected to the first switch and to ground; a second switch connected in parallel to the sampling capacitor; and a Gm cell coupled to the sampling capacitor and an output; wherein: the output of the Gm cell of each of the plurality on banks are coupled together; and the first switch and the second switch are controlled by a multi-phase signal that causes, for each of the plurality of banks, the first switch to be turned ON at a first point in time and the second switch to be turned ON at a second point in time, wherein the first point in time for a first bank is not the same as the first point in time for a second bank.
CIRCUITS FOR SWITCHED CAPACITOR RECEIVER FRONT-ENDS
Switched capacitor radio frequency receiver front-ends are provided, comprising: a plurality of banks, each comprising: a first switch connected to a RF input signal; a sampling capacitor connected to the first switch and to ground; a second switch connected in parallel to the sampling capacitor; and a Gm cell coupled to the sampling capacitor and an output; wherein: the output of the Gm cell of each of the plurality on banks are coupled together; and the first switch and the second switch are controlled by a multi-phase signal that causes, for each of the plurality of banks, the first switch to be turned ON at a first point in time and the second switch to be turned ON at a second point in time, wherein the first point in time for a first bank is not the same as the first point in time for a second bank.