Disclosed is a neuron circuit in which an overflow signal before fire is retained after the fire. The neuron circuit according to an embodiment of the inventive concept includes a synapse element, a synaptic integration unit and a pulse generation unit. The synapse element receives output signals of a pre-neuron circuit and a post-neuron circuit. The synaptic integration unit includes a capacitor charged by the current flowing into the synapse element depending on the output signals of the pre-neuron circuit and the post-neuron circuit. The pulse generation unit generates an output pulse from the charging voltage of the capacitor. The pulse generation unit includes a pulse generation circuit generating the output pulse depending on the charging voltage of the capacitor and an overflow signal retaining unit connected between the capacitor and the pulse generation circuit and retaining an overflow signal, which exceeds a threshold voltage among the charging voltage of the capacitor after the pulse generation unit fires.

Disclosed is a neuron circuit in which an overflow signal before fire is retained after the fire. The neuron circuit according to an embodiment of the inventive concept includes a synapse element, a synaptic integration unit and a pulse generation unit. The synapse element receives output signals of a pre-neuron circuit and a post-neuron circuit. The synaptic integration unit includes a capacitor charged by the current flowing into the synapse element depending on the output signals of the pre-neuron circuit and the post-neuron circuit. The pulse generation unit generates an output pulse from the charging voltage of the capacitor. The pulse generation unit includes a pulse generation circuit generating the output pulse depending on the charging voltage of the capacitor and an overflow signal retaining unit connected between the capacitor and the pulse generation circuit and retaining an overflow signal, which exceeds a threshold voltage among the charging voltage of the capacitor after the pulse generation unit fires.

A surgical instrument is disclosed. The surgical instrument includes an electric motor and a control circuit. The control circuit includes a plurality of logic gates and a monostable multivibrator. The monostable multivibrator is connected to a first one of the logic gates. The control circuit is configured to alter a rate of action of a function of the surgical instrument by controlling a speed of rotation of the electric motor based on a sensed parameter.

A surgical instrument is disclosed. The surgical instrument includes an electric motor and a control circuit. The control circuit includes a plurality of logic gates and a monostable multivibrator. The monostable multivibrator is connected to a first one of the logic gates. The control circuit is configured to alter a rate of action of a function of the surgical instrument by controlling a speed of rotation of the electric motor based on a sensed parameter.

Provided is a low-power-consumption Constant-On-Time (COT) timing circuit design method and a timing circuit. A Resistor-Capacitor (RC) circuit is adopted for timing, to eliminate static power consumption of a timer. A specific structure includes a fourth P-channel Metal Oxide Semiconductor (MOS) transistor M4 of which a source is connected to an input voltage VIN, a gate is connected to a COT control terminal TON_CONTROL and a drain is connected with one end of a fourth resistor R4. The other end of the fourth resistor R4 is connected with one end of a fourth capacitor C4. The other end of the fourth capacitor C4 is grounded. A negative input of a comparator VCMP is connected with a reference voltage, and a positive input is connected between the fourth capacitor C4 and the fourth resistor R4.

A circuit for controlling a power converter includes a pulse generator generating a first pulse signal and a second pulse signal in response to an input signal, the first pulse signal being asserted at a given time interval or thereafter after the input signal has been de-asserted, a level-shift circuit shifting a level of the first pulse signal to generate a first shifted signal and to shift a level of the second pulse signal to generate a second shifted signal, a logic circuit controlling a first-side switching device in response to the first and second shifted signals, and an output node outputting an output signal. The first-side switching device is coupled to a second side-switching device at the output node.

Provided is a low-power-consumption Constant-On-Time (COT) timing circuit design method and a timing circuit. A Resistor-Capacitor (RC) circuit is adopted for timing, to eliminate static power consumption of a timer. A specific structure includes a fourth P-channel Metal Oxide Semiconductor (MOS) transistor M4 of which a source is connected to an input voltage VIN, a gate is connected to a COT control terminal TON_CONTROL and a drain is connected with one end of a fourth resistor R4. The other end of the fourth resistor R4 is connected with one end of a fourth capacitor C4. The other end of the fourth capacitor C4 is grounded. A negative input of a comparator VCMP is connected with a reference voltage, and a positive input is connected between the fourth capacitor C4 and the fourth resistor R4.

A circuit for controlling a power converter includes a pulse generator generating a first pulse signal and a second pulse signal in response to an input signal, the first pulse signal being asserted at a given time interval or thereafter after the input signal has been de-asserted, a level-shift circuit shifting a level of the first pulse signal to generate a first shifted signal and to shift a level of the second pulse signal to generate a second shifted signal, a logic circuit controlling a first-side switching device in response to the first and second shifted signals, and an output node outputting an output signal. The first-side switching device is coupled to a second side-switching device at the output node.

Disclosed is a neuron circuit in which an overflow signal before fire is retained after the fire. The neuron circuit according to an embodiment of the inventive concept includes a synapse element, a synaptic integration unit and a pulse generation unit. The synapse element receives output signals of a pre-neuron circuit and a post-neuron circuit. The synaptic integration unit includes a capacitor charged by the current flowing into the synapse element depending on the output signals of the pre-neuron circuit and the post-neuron circuit. The pulse generation unit generates an output pulse from the charging voltage of the capacitor. The pulse generation unit includes a pulse generation circuit generating the output pulse depending on the charging voltage of the capacitor and an overflow signal retaining unit connected between the capacitor and the pulse generation circuit and retaining an overflow signal, which exceeds a threshold voltage among the charging voltage of the capacitor after the pulse generation unit fires.

A surgical instrument is disclosed. The surgical instrument includes an electric motor and a control circuit. The control circuit includes a plurality of logic gates and a monostable multivibrator. The monostable multivibrator is connected to a first one of the logic gates. The control circuit is configured to alter a rate of action of a function of the surgical instrument by controlling a speed of rotation of the electric motor based on a sensed parameter.