Some embodiments include a thermal management system for a nanosecond pulser. In some embodiments, the thermal management system may include a switch cold plates coupled with switches, a core cold plate coupled with one or more transformers, resistor cold plates coupled with resistors, or tubing coupled with the switch cold plates, the core cold plates, and the resistor cold plates. The thermal management system may include a heat exchanger coupled with the resistor cold plates, the core cold plate, the switch cold plate, and the tubing. The heat exchanger may also be coupled with a facility fluid supply.

A nanosecond pulser is disclosed. In some embodiments, the nanosecond pulser may include one or more switch circuits including one or more solid state switches, a transformer, and an output. In some embodiments, the transformer may include a first transformer core, a first primary winding wound at least partially around a portion of the first transformer core, and a secondary winding wound at least partially around a portion of the first transformer core. In some embodiments, each of the one or more switch circuits are coupled with at least a portion of the first primary winding. In some embodiments, the output may be electrically coupled with the secondary winding and outputs electrical pulses having a peak voltage greater than about 1 kilovolt and a rise time of less than 150 nanoseconds or less than 50 nanoseconds.

A nanosecond pulser is disclosed. In some embodiments, the nanosecond pulser may include one or more switch circuits including one or more solid state switches, a transformer, and an output. In some embodiments, the transformer may include a first transformer core, a first primary winding wound at least partially around a portion of the first transformer core, and a secondary winding wound at least partially around a portion of the first transformer core. In some embodiments, each of the one or more switch circuits are coupled with at least a portion of the first primary winding. In some embodiments, the output may be electrically coupled with the secondary winding and outputs electrical pulses having a peak voltage greater than about 1 kilovolt and a rise time of less than 150 nanoseconds or less than 50 nanoseconds.

Some embodiments may include a nanosecond pulser comprising a plurality of solid state switches; a transformer having a stray inductance, L.sub.s, a stray capacitance, C.sub.s, and a turn ratio n; and a resistor with a resistance, R, in series between the transformer and the switches. In some embodiments, the resonant circuit produces a Q factor according to

[00001]$Q=\frac{1}{R}\sqrt{\frac{L_s}{C_s}},$

and the nanosecond pulser produces an output voltage V.sub.out from an input voltage V.sub.in, according to V.sub.out=QnV.sub.in.

Some embodiments may include a nanosecond pulser comprising a plurality of solid state switches; a transformer having a stray inductance, L.sub.s, a stray capacitance, C.sub.s, and a turn ratio n; and a resistor with a resistance, R, in series between the transformer and the switches. In some embodiments, the resonant circuit produces a Q factor according to

[00001]$Q=\frac{1}{R}\sqrt{\frac{L_s}{C_s}},$

and the nanosecond pulser produces an output voltage V.sub.out from an input voltage V.sub.in, according to V.sub.out=QnV.sub.in.

Some embodiments include a high voltage pulsing power supply. A high voltage pulsing power supply may include: a high voltage pulser having an output that provides pulses with an amplitude greater than about 1 kV, a pulse width greater than about 1 μs, and a pulse repetition frequency greater than about 20 kHz; a plasma chamber; and an electrode disposed within the plasma chamber that is electrically coupled with the output of the high voltage pulser to produce a pulsing an electric field within the chamber.

Some embodiments include a high voltage pulsing power supply. A high voltage pulsing power supply may include: a high voltage pulser having an output that provides pulses with an amplitude greater than about 1 kV, a pulse width greater than about 1 μs, and a pulse repetition frequency greater than about 20 kHz; a plasma chamber; and an electrode disposed within the plasma chamber that is electrically coupled with the output of the high voltage pulser to produce a pulsing an electric field within the chamber.

Embodiments provided herein generally include apparatus, plasma processing systems and methods for generation of a waveform for plasma processing of a substrate in a processing chamber. One embodiment includes a waveform generator having a voltage source circuitry, a first switch coupled between the voltage source circuitry and a first output node of the waveform generator, the first output node being configured to be coupled to a chamber, and a second switch coupled between the first output node and electrical ground node. The waveform generator also includes a third switch coupled between the voltage source circuitry and a second output node of the waveform generator, the second output node being configured to be coupled to the chamber, and a fourth switch coupled between the second output node and the electrical ground node.

Embodiments provided herein generally include apparatus, plasma processing systems and methods for generation of a waveform for plasma processing of a substrate in a processing chamber. One embodiment includes a waveform generator having a voltage source circuitry, a first switch coupled between the voltage source circuitry and a first output node of the waveform generator, the first output node being configured to be coupled to a chamber, and a second switch coupled between the first output node and electrical ground node. The waveform generator also includes a third switch coupled between the voltage source circuitry and a second output node of the waveform generator, the second output node being configured to be coupled to the chamber, and a fourth switch coupled between the second output node and the electrical ground node.

A data synthesizer includes a first input circuit, a second input circuit, and an output circuit. The first input circuit is configured to latch a first data under control of a first latch clock signal. The second input circuit is configured to latch a second data under control of the first latch clock signal. A phase of the first data is the same as a phase of the second data. The output circuit is connected to the first input circuit and the second input circuit. The output circuit is configured to output the first data and the second data in sequence.