H03K5/07

ULTRASHORT HIGH POWER PULSE GENERATOR
20170257084 · 2017-09-07 ·

A method of generating a high-power Radio-Frequency ultrashort waveform comprising the steps of generating an input waveform at a relatively low power level from an impulse response characteristic of a reverberant cavity via one-bit quantization and time reversal; generating an amplified input waveform of a power higher than the input waveform via feeding the input waveform into one or more amplifiers; generating a compressed ultrashort pulse having a high power relative to the amplified input waveform via feeding the amplified input waveform into the reverberant cavity.

DV/DT CONTROL IN MOSFET GATE DRIVE
20170070223 · 2017-03-09 ·

An electronic switching circuit having a field effect transistor with a source, a drain, and a gate. A capacitor and resistor are connected in series between a gate and the source of the field effect transistor. The input signal to the circuit is connected at the junction between the capacitor and resistor.

DV/DT CONTROL IN MOSFET GATE DRIVE
20170070223 · 2017-03-09 ·

An electronic switching circuit having a field effect transistor with a source, a drain, and a gate. A capacitor and resistor are connected in series between a gate and the source of the field effect transistor. The input signal to the circuit is connected at the junction between the capacitor and resistor.

POCKELS CELL DRIVER CIRCUIT COMPRISING RESISTIVE, INDUCTIVE OR CAPACITIVE ELEMENTS

The driver circuit comprises a first node (J1), which is connected to a first terminal of the Pockels cell (CP), a second node (J2), which is connected to a second terminal of the Pockels cell (CP), wherein the first node (J1) is connected to a first potential (+HV) via a first switching unit (S1) and the second node (J2) is connected to the first potential (+HV) via a second switching unit (S2) and wherein the first node (J1) is connected to a second potential (HV) via a first resistance (R1) and the second node (J2) is connected to the second potential (HV) via a second resistance (R2); and wherein the first node (J1) is connected to the second node (J2) via a series circuit comprising a third resistance (R3) and an inductance (L1).

ISOLATED OUTPUT SWITCHING CIRCUIT
20170033785 · 2017-02-02 ·

A semiconductor device includes an output switching device having an input node, an output node, and a control input node. The control input node enables an input voltage applied to the input node to be switched to the output node. A gate pull-down circuit controls the control input node of the output switching device in response to at least one control signal. The gate pull-down circuit activates the output switching device by raising the voltage level of the control input node above the voltage level of the output node and deactivates the output switching device by clamping the control input node to the voltage level of the output node. A gate pull-up circuit receives an enable signal and generates the at least one control signal to the gate pull-down circuit in response to the enable signal.

ISOLATED OUTPUT SWITCHING CIRCUIT
20170033785 · 2017-02-02 ·

A semiconductor device includes an output switching device having an input node, an output node, and a control input node. The control input node enables an input voltage applied to the input node to be switched to the output node. A gate pull-down circuit controls the control input node of the output switching device in response to at least one control signal. The gate pull-down circuit activates the output switching device by raising the voltage level of the control input node above the voltage level of the output node and deactivates the output switching device by clamping the control input node to the voltage level of the output node. A gate pull-up circuit receives an enable signal and generates the at least one control signal to the gate pull-down circuit in response to the enable signal.

Method for determining the state of a piezoelectric element and sensor apparatus with a piezoelectric element

A method for determining the state of a piezoelectric element, in particular the piezoelectric element of a sensor apparatus, it is provided. The piezoelectric element is a component of a resonant circuit. The resonant circuit is excited to natural vibrations. The period durations of the natural vibrations of the resonant circuit are captured, and conclusions are drawn regarding the state of the piezoelectric element base on the period durations of the natural vibrations. A sensor apparatus with at least one piezoelectric element is provided. The sensor apparatus has at least one resonant circuit and that the piezoelectric element is a component of the resonant circuit. The sensor apparatus includes at least one evaluator for capturing and evaluating the natural vibrations of the resonant circuit. The evaluator includes at least one storage device for storing reference resonance frequencies that have been determined in advance.

Method for determining the state of a piezoelectric element and sensor apparatus with a piezoelectric element

A method for determining the state of a piezoelectric element, in particular the piezoelectric element of a sensor apparatus, it is provided. The piezoelectric element is a component of a resonant circuit. The resonant circuit is excited to natural vibrations. The period durations of the natural vibrations of the resonant circuit are captured, and conclusions are drawn regarding the state of the piezoelectric element base on the period durations of the natural vibrations. A sensor apparatus with at least one piezoelectric element is provided. The sensor apparatus has at least one resonant circuit and that the piezoelectric element is a component of the resonant circuit. The sensor apparatus includes at least one evaluator for capturing and evaluating the natural vibrations of the resonant circuit. The evaluator includes at least one storage device for storing reference resonance frequencies that have been determined in advance.