A device including an input configured to receive an input signal in an operational mode and to receive a reference voltage in a calibration mode is provided. The device includes a capacitor to store a reference charge based on the reference voltage and an input inverter to capture a transition of the input signal. The input inverter is coupled in series with the capacitor so that the transition of the input signal occurs when a voltage of the input signal crosses the reference voltage. The device includes an output inverter coupled in series with the input inverter to provide an output signal having a parity of the input signal. A system including the above device, and a method for calibrating the above device, are also provided.

An integrated processing unit is supplied by a power supply voltage present at the terminals of a capacitor configured to supply a maximum permissible voltage drop. A periodic pulse signal is generated having a period that is less than or equal to a current period determined from the maximum permissible voltage drop and a current consumption of the processing unit. The power supply voltage is compared with a threshold voltage at the pulse rate of the periodic pulse signal. A control signal generated from that comparison is delivered to the processing unit and has a first value when the power supply voltage is greater than or equal to the threshold voltage and a second value when the power supply voltage is less than the threshold voltage.

The present disclosure relates to a circuit comprising: a first timing guard circuit (200) configured to detect when a slack time of a first data signal arriving at a first synchronous device (202) falls below a first threshold (SLG DELAY); and a second timing guard circuit (200) configured to detect when a slack time of a second data signal arriving at a second synchronous device (202) falls below a second threshold (SLG DELAY), the first and second thresholds being different from each other.

Systems and methods for shutting down a functional circuit in response to a predetermined total ionizing dose of radiation employ at least two redundant sensing circuits operated in integrate and measure phases by one or more sequencer-type hardware or software controllers. NMOS TID sensors having leakage currents increasing monotonically with dose may be biased during integrate phases, with bias voltages or duty cycles adjusted to achieve a calibrated responsivity. TID measurements are compared to a corresponding reference, latched to generate overexpose signals, and tested for agreement. Disagreement triggers remeasurement to prevent erroneous shutdown until a minimum number of overexpose signals agree that TID exceeds the predetermined threshold. A disable circuit accepts the redundant overexpose signals and generates a signal to disable a functional circuit. Redundancy and remeasurement protect against unwarranted shutdowns due to radiation-induced single-event effects or other circuit transients or failures.

Disclosed is a differential chopper comparator, which includes an input terminal circuit that receives a first input signal and a second input signal and selectively switches the first and second input signals to intermediate circuit, at least one chopper circuit that generates a first amplified signal and a second amplified signal by amplifying a difference between the first and second input signals at the intermediate circuit points, a comparison circuit that compares the first amplified signal with the second amplified signal, digitizes the comparison result, and outputs a digital signal at a logic level, and a compensation circuit that offsets the first amplified signal and the second amplified signal and thereby removes kickback noise induced in the input terminal circuit. The differential chopper comparator of the present disclosure may shorten the settling time and may operate at high speed.

A proximity detector circuit that receives a single-ended sensor signal includes (a) an adaptive level control circuit maintaining the single-ended sensor signal within a predetermined voltage range relative a common mode reference signal; and (b) a programmable gain amplifier receiving the single-ended sensor signal and the common mode reference signal as a differential input signal, and providing an output signal derived from amplifying the differential input signal.

The present invention provides a chamfering circuit of adjustable chamfered waveform and an adjust method of a chamfered waveform. The chamfering circuit of adjustable chamfered waveform according to the present invention comprises a digital power source IC (1), a first resistor (R1), a second resistor (R2) and a triode (Tr1); wherein the chamfered waveform can be adjusted by adjusting the triode base voltage (VB) outputted by the digital power source IC (1) to promote the image quality. In comparison with prior art, welding the resistor is not required to accomplish the adjustment of the chamfered waveform. The operation is simple and the work efficiency is high.

A proximity detector circuit that receives a single-ended sensor signal includes (a) an adaptive level control circuit maintaining the single-ended sensor signal within a predetermined voltage range relative a common mode reference signal; and (b) a programmable gain amplifier receiving the single-ended sensor signal and the common mode reference signal as a differential input signal, and providing an output signal derived from amplifying the differential input signal.

The present invention provides a chamfering circuit of adjustable chamfered waveform and an adjust method of a chamfered waveform. The chamfering circuit of adjustable chamfered waveform according to the present invention comprises a digital power source IC (1), a first resistor (R1), a second resistor (R2) and a triode (Tr1); wherein the chamfered waveform can be adjusted by adjusting the triode base voltage (VB) outputted by the digital power source IC (1) to promote the image quality. In comparison with prior art, welding the resistor is not required to accomplish the adjustment of the chamfered waveform. The operation is simple and the work efficiency is high.

The invention relates generating timing signals registering the passage of a component past a sensor. The invention relates particularly to the generation of timing signals in real time for health monitoring of a mechanical system, for example for detecting excessive distortion or vibration of rotor blades in a turbine. In a disclosed arrangement, a method is provided in which a the sensor is configured to output a signal that is dependent on a separation between a component and the sensor, and the method comprises: performing a first passage event integral of an output from the sensor over at least a portion of a first passage event of a reference component past the sensor; performing a second passage event integral of an output from the sensor over at least a portion of a second passage event of a component to be measured past the sensor, the second passage event occurring after the first passage event; and generating a timing signal when the second passage event integral is equal to a predetermined fraction of the first passage event integral. By integrating the signal, short noise pulses will not cause timing errors. Optionally, only a part of the received signal will be integrated, e.g. portions of the signal which are above the average value of the signal in a preceding period of time.