A turn-off protection circuit and a turn-off protection method for a switch unit. The switch unit may include a first set of switching devices coupled between a first circuit node and an output node, and a second set of switching devices coupled between a second circuit node and the output node. The turn-off protection circuit may compare a first circuit node potential at the first circuit node and/or a second circuit node potential at the second circuit node with a switch node potential at the output node to detect a the flow direction of the a freewheeling current when the switch unit is turned off, and turn on and maintain the first set of switching devices or the second set of switching devices on depending on the flow direction of the freewheeling current until the freewheeling current is reduced to a predetermined safe current threshold.

An electronic module includes a power supply wiring line disposed on a substrate along a first side and connected to a power supply terminal, a ground wiring line disposed on the substrate along a second side and connected to a ground terminal, and first to third half bridges each having a high-side switch and a low-side switch connected in series between the power supply wiring line and the ground wiring line. Connection points of the high-side switches and the low-side switches are connected to first to third motor terminals and also connected in parallel to one another. The first motor terminal, the second motor terminal, and the third motor terminal are disposed between the power supply terminal and the ground terminal.

An electronic module includes a power supply wiring line disposed on a substrate along a first side and connected to a power supply terminal, a ground wiring line disposed on the substrate along a second side and connected to a ground terminal, and first to third half bridges each having a high-side switch and a low-side switch connected in series between the power supply wiring line and the ground wiring line. Connection points of the high-side switches and the low-side switches are connected to first to third motor terminals and also connected in parallel to one another. The first motor terminal, the second motor terminal, and the third motor terminal are disposed between the power supply terminal and the ground terminal.

Various embodiments of the teachings herein include an electronic switch comprising: a semiconductor switch; and a series circuit. The series circuit is arranged parallel to the semiconductor switch and includes a first resistor, a capacitor, and a second resistor arranged in order R-C-R. The first resistor and the second resistor are arranged to create a bifilar resistor.

A linear power supply circuit includes: an output stage including a first output transistor and a second output transistor, which are provided between an input terminal to which an input voltage is able to be applied and an output terminal to which an output voltage is able to be applied and are connected in parallel to each other; a driver configured to drive the first output transistor and the second output transistor based on a difference between a voltage based on the output voltage and a reference voltage; a resistor inserted between a gate of the first output transistor and a gate of the second output transistor; a capacitor having one end connected to the input terminal and the other end connected to a connection node between the resistor and the gate of the second output transistor; and a clamp element connected in parallel to the resistor.

A circuit for driving the voltage of a capacitive element between two voltage levels has at least one driver cell with a first pair of switches connected in series between a first terminal of a voltage source and the capacitive element, and a second pair of switches connected in series between a second terminal of the voltage source and the capacitive element. One or more non-dissipative elements may be connected between the common node of the first pair of switches and the common node of the second pair of switches. Combinations of switches from the driver cells may be activated and deactivated in a defined sequence to provide step-wise transfer of energy to the capacitive element. In one sequence, switches in a selected driver cell may subtract a specified voltage from an input voltage, bypass the selected driver cell, and add the specified voltage to the input voltage.

A snubber circuit includes a snubber substrate including an electrically insulating carrier and an electrically conducting structured layer applied thereon, the electrically conducting structured layer including two segments. The snubber circuit further includes two electrically resistive layers, each resistive layer being applied onto the two segments of the electrically conducting structured layer of the snubber substrate, and a capacitor disposed on the electrically resistive layers and having two terminals, each terminal being electrically connected to one of the electrically resistive layers. Further, a power semiconductor module having such a snubber circuit is disclosed.

A high-speed circuit with a high-voltage (HV) driver circuit. The high-speed circuit has a driver circuit and a level shifter. The driver circuit includes HV components which are operated in an HV domain. The level shifter includes low-voltage (LV) components which are operated in an LV domain. The level shifter translates signals from the LV domain to the HV domain to generate control signals for the driver circuit. The high-speed circuit may include a protection voltage generator converting a power supply voltage and a power ground voltage to generate a first direct-current bias voltage (VBP) and a second direct-current bias voltage (VBN) to bias the LV components of the level shifter. The LV components of the level shifter include input transistors and protection transistors. Gate voltages of the protection transistors may be tied to VBP or VBN.

A switch device includes a first node, a switch unit, an adjustment switch, an impedance element, a second node and a detection unit. A first terminal of the switch unit is coupled to the first node. A first terminal and a second terminal of the adjustment switch are respectively coupled to a second terminal of the switch unit and a reference voltage terminal. A first terminal and a second terminal of the impedance element are respectively coupled to the first terminal and the second terminal of the adjustment switch. The detection unit is coupled to the second node, and a control terminal of the switch unit and a control terminal of the adjustment switch. The detection unit detects a node signal at the second node to accordingly control the switch unit and the adjustment switch.

A power semiconductor circuit is provided for clamping the voltage across the circuit when a power semiconductor switch is opened (i.e., turned off). The circuit may include a first surge arrester and a first semiconductor switch coupled in parallel with the power semiconductor switch. The first semiconductor switch is coupled in series with the first surge arrester. A second surge arrester may be coupled to the gate of the first semiconductor switch to control current flow through the first semiconductor switch and the first surge arrester.