A power gating circuit includes inverters and a voltage divider sub-circuit, a latch comparator, and a gated switch sub-circuit connected to an external power supply circuit of 5V, respectively. The voltage divider sub-circuit is configured to divide a voltage of 5V and output a first voltage and a second voltage to the latch comparator and the gated switch sub-circuit, both voltage values of the first voltage and the second voltage are smaller than a withstand voltage value of a field effect transistor, and the voltage value of the first voltage is greater than that of the second voltage; the latch comparator is configured to compare two signals output by the inverters and latch a comparison result; and the gated switch sub-circuit is further connected with the latch comparator to control an output voltage, thereby improving the stability of the circuit, and extending the using life of the entire circuit.

An electronic fuse circuit for safeguarding a multi-channel electronic power distributor includes a driver circuit for each channel of the power distributor configured to control an electronic switch of a corresponding channel to assume a certain state, and a microcontroller interface configured to receive from a microcontroller a command for setting the state of the electronic switch of a corresponding channel. The driver circuit of the corresponding channel is configured to set the state of the electronic switch of the corresponding channel according to the command from the microcontroller. The electronic fuse circuit further includes a safety circuit for detecting a malfunction in the microcontroller and/or the power distributor. In the event of a detected malfunction in the microcontroller and/or the power distributor, the driver circuit of each channel is configured to set the state of the electronic switch of the corresponding channel according to a channel-specific preconfigured safety state.

A signal detection circuit includes: a voltage dividing circuit having at least a first pair of voltage dividing capacitors connected in series for dividing an input voltage and configured to output a divided voltage, and a detection circuit configured to detect the divided voltage. The first pair of voltage dividing capacitors are included in one semiconductor device. The semiconductor device includes: (i) a semiconductor substrate, (ii) a first conductor layer, (iii) a first dielectric layer, (iv) a second conductor layer, (v) a second dielectric layer, (vi) a third conductor layer, and (vii) a short-circuit portion configured to short-circuit the first conductor layer and the semiconductor substrate.

A power supply control device controls power supply by switching on or off a first semiconductor switch and a second semiconductor switch that are arranged on a current path. A first diode and a second diode are connected between a drain and a source of the first semiconductor switch and the second semiconductor switch, respectively. Cathodes of the first diode and the second diode are arranged downstream and upstream of the respective anode on the current path. If current flows through the current path even though a microcomputer has given an instruction to switch the first semiconductor switch and the second semiconductor switch off, a first drive circuit switches the first semiconductor switch on.

Provided are embodiments for a system for performing input power detection. The system includes a first input for a first power source, a second input for a second power source, and a controller that is operably coupled to the first power source and the second power source. The system also includes a first path connecting a first circuit to the first power supply, wherein the first path comprises a first field effect transistor (FET) that is operated to inhibit leakage current flow to the first circuit, and a second path connecting a second circuit to the second power supply, wherein the second path comprises a second FET that is operated to inhibit leakage current flow to the second circuit. Also provided are embodiments for a method for performing input power detection.

A semiconductor module including a first switching device coupled to a first line, a terminal, at which a first voltage corresponding to a first current flowing through the first switching device is generated, coupled to the first switching device, a second switching device coupled to the first line for allowing a second current corresponding to the first current to flow therethrough, a voltage generation circuit configured to apply, to a second line, a second voltage lower than a power supply voltage, a resistor, across which a third voltage corresponding to the second current is generated, coupled between the second switching device and the terminal, a reference voltage circuit coupled to the terminal for generating a fourth voltage, and a comparator circuit coupled between the first and second lines, for determining whether the first switching device is in an overcurrent state based on a comparison between the third and fourth voltages.

Techniques and apparatus for driving a transistor gate of a switched-mode power supply (SMPS) circuit. One example gate driver for a switching transistor of an SMPS circuit generally includes a first power supply rail; a reference rail; an output node for coupling to a control input of the switching transistor; a floating supply node; a pulldown transistor having a drain coupled to the output node of the gate driver and having a source coupled to the reference rail; and a pulldown logic buffer having a first power supply input coupled to the floating supply node, having a second power supply input coupled to the reference rail, and having an output coupled to a gate of the pulldown transistor. The floating supply node is configured to selectively receive power from the first power supply rail and the output node of the gate driver.

There is provided a protection device capable of protecting a load drive system at an appropriate timing according to the temperature of a power semiconductor.

A protection device includes: a capacitor that outputs a voltage according to a charge accumulated by a first current; and a protection circuit that determines whether or not the voltage output by the capacitor exceeds a certain threshold value, generates a second current having a magnitude according to information related to the temperature of a power semiconductor which drives a load, and changes the magnitude of the first current based on the generated second current.

Disclosed is a system for arbitrary control of amplitude, phase and polarization characteristics of light in pulsed laser systems, allowing fast pulse-to-pulse modification of the above-mentioned parameters for single pulses or arbitrarily long and closely-spaced bursts of pulses. The control uses an electro-optic device, driving it by a specially designed high voltage driver. The operation of the driving electronics is based on the precise control of charging and discharging a Pockels cell inherent capacitance. This inherent capacitance is typically considered as parasitic. Therefore, prior voltage drivers operate in spite of the capacitance instead of using it. The present high voltage driver consists of a multitude of current-controlled stages capable of sinking and sourcing specific and adjustable currents into the capacitive load of the Pockels cell. The disclosed device and the corresponding control method allow for precise and energy-efficient shaping of Pockels cell control voltage.

A linear power supply circuit includes: an output stage including a first output transistor and a second output transistor, which are provided between an input terminal to which an input voltage is able to be applied and an output terminal to which an output voltage is able to be applied and are connected in parallel to each other; a driver configured to drive the first output transistor and the second output transistor based on a difference between a voltage based on the output voltage and a reference voltage; a resistor inserted between a gate of the first output transistor and a gate of the second output transistor; a capacitor having one end connected to the input terminal and the other end connected to a connection node between the resistor and the gate of the second output transistor; and a clamp element connected in parallel to the resistor.