Methods and devices to mitigate de-biasing caused by an undesired gate induced drain body leakage current in FET switch stacks are disclosed. The devices utilize diode stacks to generate discharge paths for the undesired current. The disclosed teachings are applicable to both shunt and series implementations of FET switch stacks.

Methods and devices to mitigate de-biasing caused by an undesired gate induced drain body leakage current in FET switch stacks are disclosed. The devices utilize diode stacks to generate discharge paths for the undesired current. The disclosed teachings are applicable to both shunt and series implementations of FET switch stacks.

A transmit/receive switching assembly includes a symmetrical PIN diode-based switch to selectively connect an antenna port to one of a transmit port and a receive port, transmit bias control circuitry that receives a first bias control signal, receive bias control circuitry that receives a second bias control signal, and shunt bias control circuitry coupled between the symmetrical PIN diode-based switch and a reference node. The first and second bias control signals are simultaneously and oppositely switchable between first and second voltage values and together configured to operate the switch between a transmit mode where RF signal flow is enabled from the transmit port to the antenna port and isolation is provided between the antenna port and the receive port, and a receive mode where RF signal flow is enabled from the antenna port to the receive port and isolation is provided between the antenna port and the transmit port.

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

A solid-state relay circuit includes an isolator circuit, a first output terminal, a second output terminal, and an output switch. The output switch is coupled to the isolator circuit, and includes a first transistor, a second transistor, and a diode. The first transistor is coupled to the first output terminal. The second transistor is coupled to the first transistor and the second output terminal. The diode is coupled to the first transistor, the second transistor, and ground, and is configured to block current flow from ground to the first transistor and the second transistor. The isolator circuit is coupled to the output switch and is configured to activate the first transistor and the second transistor.

A solid-state relay circuit includes an isolator circuit, a first output terminal, a second output terminal, and an output switch. The output switch is coupled to the isolator circuit, and includes a first transistor, a second transistor, and a diode. The first transistor is coupled to the first output terminal. The second transistor is coupled to the first transistor and the second output terminal. The diode is coupled to the first transistor, the second transistor, and ground, and is configured to block current flow from ground to the first transistor and the second transistor. The isolator circuit is coupled to the output switch and is configured to activate the first transistor and the second transistor.

A high-frequency switch circuit includes a first switch configured to electrify or cut off connection between an antenna terminal and an input terminal, and a second switch configured to electrify or cut off connection between the antenna terminal and an output terminal. The first switch has a transmission line connecting the antenna terminal and the input terminal; a diode having an anode connected to a first node between the transmission line and the input terminal, and a cathode connected to a second node; and a capacitor connected to the second node and a first power supply voltage. A first control terminal is connected to the first node via a first resistor and a first inductor. The first switch further includes a charging/discharging circuit connected to a second power supply voltage and the first control terminal and charging and discharging the capacitor from the second node.

A high-frequency switch circuit includes a first switch configured to electrify or cut off connection between an antenna terminal and an input terminal, and a second switch configured to electrify or cut off connection between the antenna terminal and an output terminal. The first switch has a transmission line connecting the antenna terminal and the input terminal; a diode having an anode connected to a first node between the transmission line and the input terminal, and a cathode connected to a second node; and a capacitor connected to the second node and a first power supply voltage. A first control terminal is connected to the first node via a first resistor and a first inductor. The first switch further includes a charging/discharging circuit connected to a second power supply voltage and the first control terminal and charging and discharging the capacitor from the second node.

A radio frequency switch circuit includes a negative voltage generating circuit, a notch network, a logic control circuit, and a radio frequency switching circuit. The logic control circuit can be configured to, upon being driven by the negative voltage signal generated by the negative voltage generating circuit, control the operating modes of the radio frequency switching circuit; and the notch network is connected between the negative voltage generating circuit and the logic control circuit. As such, the influence of radio frequency signals generated by the radio frequency switching circuit can be filtered through the notch network, and the interference of radio frequency signals to the negative voltage generating circuit can be reduced, thereby improving the performance of the radio frequency switch circuit, for example in insertion loss, isolation and harmonic suppression.