First and second comparators receive input signals of opposed polarities and drive operation of a switch in response thereto. A first current generator supplies a first current to the switch which, in response to the control of the first and second comparators, applies the first current, alternatively, to a first node or a second node. A second current generator sinks a second current from the first node and a third current generator sinks a third current from the second node. A logic circuit has inputs coupled to the first node and the second node, respectively, receives respective switching signals having fast switching wavefronts and delayed switching wavefronts. The output of logic circuit is configured for switching between a first state and a second state with switching between the first state and the second state triggered by the fast switching wavefronts of the respective switching signals.

Techniques to compensate non-radiation hardened components for changes or degradation in performance that result from exposure to radiation. During testing and modeling phase, a component's performance may be characterized as a result of the exposure to radiation. In some examples, some performance characteristics, such as voltage response, frequency response, gain, leakage or other characteristics, may change as the component's exposure to an amount of radiation increases. During normal operation, a system may include one or more devices that measure the amount of radiation to which the system may be subjected, such as a radiation dosimeter. The system may compensate the non-radiation hardened component based on the amount of radiation received the known component performance change caused by radiation as determined during the modeling phase.

An asynchronous circuit which includes a first circuit suitable for receiving, from a first other circuit, a first data input signal, and for generating a first acknowledgement of receipt signal and a first data output signal; a second circuit suitable for receiving, from a second other circuit, a second data input signal, and for generating a second acknowledgement of receipt signal and a second data output signal, the second circuit being functionally equivalent to the first circuit; a comparator suitable for detecting an inconsistency between the first and second data input or output signals; and at least one circuit for pausing an acknowledgement of receipt suitable for preventing the propagation of the first and second acknowledgement of receipt signals towards the first and second other circuits if an inconsistency is detected by the comparator.

A semiconductor device includes: an electronic circuit to receive a first signal and transmit a second signal; a power supply circuit to supply a power supply voltage to the electronic circuit; and a correction circuit to change a value of the power supply voltage to switch between a normal and a refresh operation mode. The electronic circuit includes: a first Pch transistor in which a potential of a first gate changes according to the first signal, and a potential of one of the first source and drain changes in response to the power supply voltage; and a first Nch transistor in which the second gate is electrically connected to the first gate, a potential of one of the second source and drain is equal to or lower than a ground potential, and another of the second source and drain is electrically connected to another of the first source and drain.

The present invention provides a radiation-damage-compensation-circuit and a SOI-MOSFET that has high radiation resistance. The SOI-MOSFET has the radiation-damage-compensation-circuit to recover the characteristics of the SOI-MOSFET after X-ray irradiation.

A circuit for storing data in an integrated circuit is described. The circuit comprises an inverter comprising a first transistor having a first gate configured to receive input data and a first output configured to generate a first inverted data output and a second transistor having a second gate configured to receive the input data and a second output configured to generate a second inverted data output; a first pass gate coupled to the first output of the inverter; a second pass gate coupled to the second output of the inverter; and a storage element having an input coupled to receive an output of the first pass gate and an output of the second pass gate. A method of storing data in an integrated circuit is also described.

First and second comparators receive input signals of opposed polarities and drive operation of a switch in response thereto. A first current generator supplies a first current to the switch which, in response to the control of the first and second comparators, applies the first current, alternatively, to a first node or a second node. A second current generator sinks a second current from the first node and a third current generator sinks a third current from the second node. A logic circuit has inputs coupled to the first node and the second node, respectively, receives respective switching signals having fast switching wavefronts and delayed switching wavefronts. The output of logic circuit is configured for switching between a first state and a second state with switching between the first state and the second state triggered by the fast switching wavefronts of the respective switching signals.

A level-shifter circuit operates to shift an input signal referenced to a first set supply voltages to generate an output signal referenced to a second set of supply voltages. The output signal from the level-shifter circuit is latched by a latching circuit. A logic gate has a first input configured to receive the input signal, a second input configured to receive a feedback signal and an output coupled to a input of the level shifting circuit. A feedback circuit has a first input configured to receive the output signal, a second input configured to receive the input signal and an output configured to generate the feedback signal. The feedback circuit operates to sense an uncontrolled switching event of the output signal occurring in the absence of a switching of the input signal and apply, in response thereto, the feedback signal to cancel the uncontrolled switching event.

An electronic device with one or more gates that each include first circuit blocks configured for implementing a first N-type logic function and second circuit blocks configured for implementing a second N-type logic function that is a complement of the first N-type logic function. In the electronic device, a number of the of first circuit blocks and a number of the second circuit blocks are the same. Further, the first circuit blocks and the second circuit blocks each have a block feedback node, a block output node, and one or more block input logic nodes. Also, the block feedback node for each one of the first circuit blocks is singly coupled to the block output node of one of the second circuit blocks and the block output node of the one of the first circuit blocks is singly coupled to the block feedback node of another of the second circuit blocks.

An electronic device with one or more gates that each include first circuit blocks configured for implementing a first N-type logic function and second circuit blocks configured for implementing a second N-type logic function that is a complement of the first N-type logic function. In the electronic device, a number of the of first circuit blocks and a number of the second circuit blocks are the same. Further, the first circuit blocks and the second circuit blocks each have a block feedback node, a block output node, and one or more block input logic nodes. Also, the block feedback node for each one of the first circuit blocks is singly coupled to the block output node of one of the second circuit blocks and the block output node of the one of the first circuit blocks is singly coupled to the block feedback node of another of the second circuit blocks.