Patent classifications
H03K19/1733
Nonvolatile memory device, operation method of the nonvolatile memory device, and operation method of memory controller controlling the nonvolatile memory device
A nonvolatile memory device includes a control logic circuit that receives a read command from outside the nonvolatile memory device, a memory cell array which includes a plurality of memory cells connected to a plurality of word lines, an address generator that generates a plurality of addresses based on read information from the outside of the nonvolatile memory device, an address decoder sequentially selects a plurality of pages in at least one word line, which correspond to the plurality of addresses, a page buffer circuit that is connected to the memory cell array through a plurality of bit lines, and prepares a plurality of sequential data from memory cells connected to the selected pages by the address decoder, and an input/output circuit that continuously outputs the plurality of sequential data from the page buffer circuit to the outside of the nonvolatile memory device through data lines.
Open-canal in-ear device
An in-ear device includes a housing shaped to be held in an ear of a user, and be positioned around a canal of the ear so the canal is unobstructed by the in-ear device, and an audio package positioned within the housing to project sound into the canal when the in-ear device is disposed in the ear. A controller is disposed in the housing and coupled to the audio package, and the controller includes logic that when executed by the controller causes the in-ear device to perform operations, including emitting the sound from the audio package towards the canal of the ear.
Bank to bank data transfer
The present disclosure includes apparatuses and methods for bank to bank data transfer. An example apparatus includes a plurality of banks of memory cells, an internal bus configured to transfer data between the plurality of banks and an external bus interface, and a bank-to-bank transfer bus configured to transfer data between the plurality of banks.
PIXEL BLOCK-BASED DISPLAY DATA PROCESSING AND TRANSMISSION
A system for compensating display data of an image includes a display, a processor, and control logic operatively coupled to the display and the processor. The display has a plurality of pixels. The processor includes a graphics pipeline configured to generate a set of original display data of the image for a plurality of frames. The processor also includes a pre-processing module configured to determine a still portion of the set of original display data, and generate a set of compensation data for the still portion of the set of original display data. The set of compensation data includes a plurality of sub-sets of compensation data for the plurality of frames. The processor also includes a data transmitter configured to transmit, in each one of the plurality of frames, a stream of display data including one of the plurality of sub-sets of the compensation data.
RESIN TRANSFER MOLDING SYSTEMS AND CONTROL LOGIC FOR MANUFACTURING FIBER-REINFORCED COMPOSITE PARTS
Presented are manufacturing control systems for fabricating composite-material structures, methods for making/operating such systems, and resin transfer molding techniques for ameliorating race-tracking effects in fiber-reinforced polymer panels. A method for forming a composite-material construction includes confirming, via a system electronic control unit (ECU), that a fiber-based preform is placed in a mold cavity and that opposing mold segments of the molding apparatus are sealed together. A filler, such as a compressible bladder, a cluster of spring-biased pins, or a spray-chopped fiber bed, is introduced into a void between the fiber-based preform and a tool face of one mold segment to thereby eliminate an unwanted resin race track. The system ECU commands a resin pump to inject resin through a primary gate of the molding apparatus and into the mold cavity to thereby impregnate the fiber-based preform with the resin. One or more vents operate to evacuate air from the mold.
Determination of a match between data values stored by several arrays
Apparatuses, systems, and methods related to determination of a match between data values stored by several arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by two arrays selected from the plurality to determine whether there is a match between the data values stored by the two arrays. The apparatus further includes an output component configured to output data values of one of the two arrays responsive to determination of the match between the data values stored by the two arrays.
Integrated circuit device with embedded programmable logic
Systems and methods are provided to enhance the functionality of an integrated circuit. Such an integrated circuit may include a primary circuitry and an embedded programmable logic programmable to adjust the functionality of the primary circuitry. Specifically, the embedded programmable logic may be programmed to adjust the functionality of the primary circuitry to complement and/or support the functionality of another integrated circuit. Accordingly, the embedded programmable logic may be programmed with functions such as data/address manipulation functions, configuration/testing functions, computational functions, or the like.
Transient sensing circuitry
Various implementations described herein are directed to an integrated circuit with logic circuitry having one or more components. The integrated circuit may include performance sensing circuitry that provides a performance sensing output associated with detecting variation of switching delays of the one or more components forming the logic circuitry. The integrated circuit may include transient sensing circuitry that receives the performance sensing output and provides a transient sensing output for determining stability of operating conditions of the performance sensing circuitry during one or more sampling periods. The transient sensing circuitry may use a finite state machine (FSM) to sense and classify changes in temporal behavior of the transient sensing output.
High-voltage and low-voltage signaling output driver
A hybrid output driver is disclosed that supports high-voltage signaling and low-voltage signaling. The high-voltage signaling is powered by a high-power supply voltage that is greater than a low-power supply voltage that powers the low-voltage signaling.
OPEN-CANAL IN-EAR DEVICE
An in-ear device includes a housing shaped to be held in an ear of a user, and be positioned around a canal of the ear so the canal is unobstructed by the in-ear device, and an audio package positioned within the housing to project sound into the canal when the in-ear device is disposed in the ear. A controller is disposed in the housing and coupled to the audio package, and the controller includes logic that when executed by the controller causes the in-ear device to perform operations, including emitting the sound from the audio package towards the canal of the ear.