A superconducting device includes two nodes and a Josephson junction coupled between the two nodes, wherein the Josephson junction is characterized by a superconducting phase difference, , wherein the superconducting device has a potential that varies as a function of the superconducting phase difference, , and has a single potential well. The potential has a non-zero cubic term and quartic term is zero. The Josephson junction may be a single small Josephson junction. The superconducting device may include a superconducting ring connected between the two nodes. The superconducting ring may include a first ring portion with a plurality of large Josephson junctions connected in series. The superconducting ring may also include a second ring portion that includes the single small Josephson junction in parallel with the plurality of large Josephson junctions between the two nodes.

In some embodiments, a superconducting parametric amplification neural network (SPANN) includes neurons that operate in the analog domain, and a fanout network coupling the neurons that operates in the digital domain. Each neuron is provided one or more input currents having a resolution of several bits. The neuron weights the currents, sums the weighted currents with an optional bias or threshold current, then applies a nonlinear activation function to the result. The nonlinear function is implemented using a quantum flux parametron (QFP), thereby simultaneously amplifying and digitizing the output current signal. The digitized output of some or all neurons in each layer is provided to the next layer using a fanout network that operates to preserve the digital information held in the current.

A device includes a plurality of superconducting components, each having a first terminal and a second terminal; a plurality of current sources, being electrically-connected to the first terminal of a corresponding superconducting component and configured to selectively provide a first current; and a bias current source electrically-connected to the respective first terminal of each of the plurality of superconducting components. The bias current source is configured to provide a second current adapted to bias the superconducting components such that (1) a combination of the second current and the first current from each current source causes the plurality of superconducting components to transition from the superconducting state to the non-superconducting state, and (2) a combination of the second current and the first current from each current source of only a subset of the plurality of current sources does not cause the plurality of superconducting components to transition to the non-superconducting state.

A milliohm resistor is fabricated as a Josephson junction device that contains ferromagnetic or antiferromagnetic material of sufficient thickness to render the device entirely resistive between terminals. The device can have a resistance on the order of milliohms and can be consume a much smaller chip footprint than resistors of the same resistance fabricated using conventional resistive materials. Because the device can be fabricated without modification to processes used to fabricate reciprocal quantum logic (RQL) circuitry, it can easily be incorporated in RQL circuits to mitigate flux trapping or to perform other functions where very small resistances are needed. In particular, the device can burn off circulating currents induced by trapped flux without affecting the transmission of SFQ pulses through RQL circuitry.

A milliohm resistor is fabricated as a Josephson junction device that contains ferromagnetic or antiferromagnetic material of sufficient thickness to render the device entirely resistive between terminals. The device can have a resistance on the order of milliohms and can be consume a much smaller chip footprint than resistors of the same resistance fabricated using conventional resistive materials. Because the device can be fabricated without modification to processes used to fabricate reciprocal quantum logic (RQL) circuitry, it can easily be incorporated in RQL circuits to mitigate flux trapping or to perform other functions where very small resistances are needed. In particular, the device can burn off circulating currents induced by trapped flux without affecting the transmission of SFQ pulses through RQL circuitry.

One example includes a Josephson analog-to-digital converter (ADC) system. The system includes a control line inductively coupled to an input signal line on which an input analog signal is provided. The input signal line can be inductively coupled to the control line to propagate an induced input current that is based on the input analog signal on the control line. The system also includes at least one Josephson transmission line (JTL) stage that is biased via a DC bias current and is configured to generate an output pulse in response to the induced input current and the DC bias current exceeding a predetermined threshold current associated with the at least one JTL stage.

A device includes a logic circuit comprising a clockless single flux quantum logic gate which comprises a plurality of input ports, an output port, an output Josephson junction, and a plurality of dynamic storage loop circuits and isolation buffer circuits. The output Josephson junction is coupled to an output of each dynamic storage loop circuit and configured to drive the output port. Each isolation buffer circuit is coupled to a respective input port, and a respective dynamic storage loop circuit and configured to absorb a circulating current of an antifluxon which is injected into the respective dynamic storage loop circuit to prevent the antifluxon from being output from the respective input port, and to inject a fluxon into the respective dynamic storage loop circuit in response to a single flux quantum pulse applied to the respective input port, and annihilate an antifluxon present in the respective dynamic storage loop circuit.

An inverting reciprocal quantum logic (RQL) phase-mode D flip-flop accepts a data input and a logical clock input. The flip-flop includes a stacked Josephson junction and a comparator. The triggering or untriggering of the stacked Josephson junction by positive or negative single flux quantum (SFQ) pulses can switch a direction of DC bias current through a component of the comparator, such as an output Josephson junction, which can then either pass or suppress logical clock SFQ pulses. When so passed, the data input is captured to the output upon clocking the flip-flop via the provision of the logical clock SFQ pulses, e.g., as reciprocal pulse pairs.

Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.

Superconducting methods of determining AND, OR, AND-OR, and OR-AND logic values use single flux quantum (SFQ) pulses to assert logical inputs of a reciprocal quantum logic (RQL) gate by placing currents in input storage loops in the RQL gate and, based on the currents in the storage loops, triggering logical decision Josephson junctions (JJs) in the gate, such that an assertion or de-assertion signal corresponding to the logical function of the gate is observed at the output. The methods permit for outputs based on at least four logical inputs to be achieved.