The present invention involves driving multiple capacitors, including a shielding capacitance (Cin_sd), to minimize voltage fluctuations detected on the CDA signal line 200, thereby enhancing the resolution of the ADC. The additional capacitance (Cobj) generated between the CDA 100 and the object 20 due to the appearance of the object 20 is detected in the form of voltage. By analyzing with an ADC of improved resolution, it is possible to detect the presence of the object 20 more reliably.

According to one embodiment, an analog-to-digital converter includes: a digital-to-analog converter configured to generate an analog voltage based on a sampled analog signal and a digital code; a clock generator configured to generate a first clock signal; a comparator configured to receive the analog voltage from the digital-to-analog converter, and perform digital output based on the first clock signal; and a controller configured to generate the digital code based on the digital output of the comparator. The clock generator varies a delay period, which is from the end of sampling of the analog signal to the start of generating the first clock signal, for each sampling of the analog signal.

According to one embodiment, an analog-to-digital converter includes: a digital-to-analog converter configured to generate an analog voltage based on a sampled analog signal and a digital code; a clock generator configured to generate a first clock signal; a comparator configured to receive the analog voltage from the digital-to-analog converter, and perform digital output based on the first clock signal; and a controller configured to generate the digital code based on the digital output of the comparator. The clock generator varies a delay period, which is from the end of sampling of the analog signal to the start of generating the first clock signal, for each sampling of the analog signal.

Embodiments of the present disclosure may include an ADC circuit including channel register sets, a conversion request flip-flop, a priority encoder circuit, and a controller circuit. The controller circuit may be configured to receive a conversion request signal, latch the conversion request signal into the conversion request flip-flop, determine by the priority encoder circuit a highest priority pending conversion request, and output an active channel identifier code. The channel identifier code may be configured to select the data channel register sets that are active by identifying received selection bits. The embodiments may include logic to store a converted value from a selected analog input to a data output register based on the channel identifier code.

Some disclosed embodiments relate, generally, to shaping a waveform of a reference signal used by a driver of a touch sensor to limit electromagnetic emissions (EME) emitted by a touch sensor during a sensing operation. Some disclosed embodiments relate, generally, to a DAC referenced touch sensor driver and controlling an amount of EME emitted at a touch sensor using shapes of reference signals used by a touch detector to detect touches at the touch sensor. Some disclosed embodiments relate, generally, to compensating for effects of foreign noise at a touch sensor and, more specifically, to changing a shape of a reference signal based on a change to a sampling rate made to compensate for foreign noise.

Embodiments of the present disclosure may include an ADC circuit including channel register sets, a conversion request flip-flop, a priority encoder circuit, and a controller circuit. The controller circuit may be configured to receive a conversion request signal, latch the conversion request signal into the conversion request flip-flop, determine by the priority encoder circuit a highest priority pending conversion request, and output an active channel identifier code. The channel identifier code may be configured to select the data channel register sets that are active by identifying received selection bits. The embodiments may include logic to store a converted value from a selected analog input to a data output register based on the channel identifier code.

The invention relates to an optically-based analogue-to-digital converter comprising: a first combiner with a first input for an optical reference signal, and a second input for an input signal that is to be digitised, a second combiner with a first input for a pulsed laser signal, and a second input, which is connected to the output of the first combiner, an evaluation unit, which evaluates the output signal of the second combiner s.

A DAC cell circuit includes: at least a DAC cell, including: a first MOSFET having a drain coupled to a first switch for receiving a first current and coupled to a second switch for generating a second current, a source coupled to ground, and a gate coupled to a first bias voltage; a capacitor coupled between the gate and the drain of the first MOSFET; and a dead-band switch coupled between the gate of the first MOSFET and the bias node. The dead-band switch is controlled by a signal which is periodic with respect to a frequency equal to an input data rate of the DAC cell, and the dead-band switch is open during a data transition.

Aspects of the present disclosure provide methods and apparatuses for operating an analog-to-digital converter. A method in accordance with an aspect of the present disclosure may comprise initializing a digital-to-analog converter (DAC) value of a DAC, determining whether an analog-to-digital converter (ADC) operates within a predetermined range based on an input to the DAC, initiating a conversion at a first ADC resolution when the ADC is operating within the predetermined range, and incrementally changing the DAC value when the ADC is not operating within the predetermined range.

One or more computing devices, systems, and/or methods are provided. In an example of the techniques presented herein, a method is provided. The method includes generating a bias signal based on an index, connecting a first amplifier of a first programmable analog block to a sensor terminal, and amplifying a sensor signal received at the sensor terminal in the first amplifier based on the bias signal to generate an amplified sensor signal. The amplified sensor signal is sampled to generate an output sample. Responsive to detecting a limit violation associated with the output sample, the index is modified to generate a modified index and the bias signal is adjusted based on the modified index.