Disclosed are a method and a device for improving an output accuracy of a digital-to-analog converter. The method includes: calculating an output error of the digital-to-analog converter based on output accuracy and an input error of the digital-to-analog converter; obtaining at least one of the output error, comparing the at least one output error against a preset threshold, and adjusting an integer input value of the digital-to-analog converter according to a comparison result.

Systems and methods for measurement and management are disclosed that provide complex measurements cost-effectively at very high accuracy. These methods and systems in some cases achieve measurement accuracy exceeding the accuracy of the reference standards they rely on, and eliminate expensive and disadvantageous recalibration procedures. The accurate measurements are integrated with management functions, applying the measurement data to meet objectives of the integrated system and workflow goals of its user. The disclosed systems and methods comprise an explicit or expressly represented model both of themselves and of candidate external systems to be measured and managed. The models may be configured and reconfigured by the owner-user through either local or remote means. The system intelligently reconfigures itself to adapt dynamically to the conditions of measurement and the user's and system's goals at each moment. In an embodiment, the system includes high-accuracy and reconfigurable components including a meter or control head adapted for user precision assembly and maintenance that computes and displays or communicates the measurements, displaying measurements in desired units, grouping functions according to ergonomic and cognitive principles based on the activity and workflow of a user in relation to the internal model. The use of models permits the system to compute and provide complex and inferred measurements of ultimate interest to the user, including quantities that cannot be directed measured and only can be determined through reasoning or computation by applying models to raw measurement data. The precision-assembly modular electromechanical design further permits an owner-user to precisely assemble, maintain, modify the apparatus and calibrate the equipment for accuracy.

Various embodiments relate to a single slope analog to digital converter (ADC), including: a voltage slope generator configured to generate a voltage slope based upon a fixed current and variable current; an analog comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register configured to store a first count based upon a reference voltage being input into the analog comparator; a second register configured to store a second count based upon an input voltage being input into the analog comparator, wherein the input voltage is the voltage to be converted to a digital value by the ADC; and a digital to analog converter (DAC) configured to produce a slope trim signal based upon the voltage slope output by the voltage slope generator, the first count, and a count target associated with the voltage reference, wherein the variable current in the voltage slope generator is based upon the slope trim signal.

A digital-to-analog converter (DAC) device includes a DAC circuitry and a calibration circuitry. The DAC circuitry includes first and second DAC circuits which generate first and second signals according to an input pattern. The input pattern includes at least one of first logic value and at least one of second logic value that have different numbers. The calibration circuitry performs a calibration operation according to first and second comparison results, to generate a control signal for controlling the second DAC circuit. The first comparison results are comparison results of the first and the second signals when the input pattern is a first pattern, the second comparison results are comparison results of the first and the second signals when the input pattern is a second pattern, and the first pattern is inverse to the second pattern.

An analog to digital converter (ADC) circuit includes voltage and reference input terminals, a sample circuit, and control logic. The sample circuit includes input and output terminals, and capacitors connected in parallel and arranged between the input and output terminals. The control logic is configured to, in a calibration phase of operation, cause the multiplexer to route the ADC reference input terminal to the sampling voltage input terminal, determine a given gain value, determine a set of the capacitors to be used to achieve the given gain value, successively enable capacitor subsets to sample voltage of the reference input while disabling a remainder of the capacitors until all capacitors have been enabled, determine a resulting output code, and from the output code, determine a gain error of the given gain value of the ADC circuit.

A gain calibration device for an ADC residue amplifier includes a DAC and a flash ADC. The DAC is configured to convert the digital signal to an analog signal, and the DAC includes a calibration module used in the gain calibration of the ADC residual amplifier. The flash ADC is configured to generate a digital signal, the flash ADC includes a plurality of comparators, the total number of the plurality of comparators is equal to the number of output bits of the flash ADC, and the comparators are configured to be unevenly distributed in an input range.

The present invention relates to a signal duty cycle adaptive-adjustment circuit and method for a receiving terminal. In one embodiment, the circuit includes an analog level comparison circuit, a preprocessing circuit, a first path switch, a second path switch, a decoding circuit, a parameter extraction and estimation circuit, an error generation circuit, a filter feedback circuit and a digital-to-analog conversion circuit. The analog level comparison circuit receives a valid signal according to a reference level to generate a duty cycle signal. The preprocessing circuit preprocesses the duty cycle signal. When the first path switch is turned on, the parameter extraction and estimation circuit acquires duty cycle information from the duty cycle signal to generate a duty cycle deviation. The error generation circuit processes the duty cycle deviation to generate an error signal. The filter feedback circuit and the digital-to-analog conversion circuit filter the error signal and then convert the error signal into an analog voltage signal, which is connected to the analog level comparison circuit to serve as a reference level. When the second path switch is turned on, the decoding circuit decodes the duty cycle signal.

A digital to analog converter (DAC) that receives a binary coded signal and generates an analog output signal includes a binary-to-thermometer decoder and a resistive network. The decoder receives the binary coded signal, and decodes it into thermometer signals. The resistive network has branches that are coupled to an output terminal of the DAC in response to the thermometer signals. Each of the branches includes first and second resistors, and a switch. The first resistor is coupled between a first reference voltage and the switch, and the second resistor is coupled between a second reference voltage and the switch. The switch couples either the first resistor or the second resistor to the output terminal in response to a corresponding thermometer signal.

A digital to time converter (DTC) system is disclosed. The DTC system comprises a DTC circuit configured to generate a DTC output clock signal at a DTC output frequency, based on a DTC code. In some embodiments, the DTC system further comprises a calibration circuit comprising a period error determination circuit configured to determine a plurality of period errors respectively associated with a plurality consecutive edges of the DTC output clock signal. In some embodiments, each period error of the plurality of period errors comprises a difference in a measured time period between two consecutive edges of the DTC output clock signal from a predefined time period. In some embodiments, the calibration circuit further comprises an integral non-linearity (INL) correction circuit configured to determine a correction to be applied to the DTC code based on a subset of the determined period errors.

Embodiments disclosed herein include a method of calibrating a tool for converting photonic signals to electrical signals. In an embodiment, the method comprises connecting a calibration module to a calibrated current source, finding a transfer function for a plurality of modes with the calibration module, and storing the transfer functions in a lookup table.