A physical quantity detection circuit includes: a detection signal generation circuit generating a detection signal, based on an output signal from a physical quantity detection element; an analog/digital converter circuit converting the detection signal into a first digital signal and converting a test signal into a second digital signal; a test signal generation circuit generating the test signal; and a malfunction diagnosis circuit diagnosing a malfunction of the analog/digital converter circuit, based on the second digital signal. A full-scale voltage of the analog/digital converter circuit is selected from among a plurality of voltages having different magnitudes, according to a power supply voltage. The test signal includes an upper limit value test signal, a lower limit value test signal, and a first intermediate value test signal. The test signal generation circuit performs resistive voltage division of the full-scale voltage and thus generates the first intermediate value test signal.

A sampling clock generating circuit and an analog to digital converter (ADC) includes a variable resistance circuit, a NOT-gate type circuit, and a capacitor, where an input end of the NOT-gate type circuit receives a pulse signal whose period is T, an output end of the NOT-gate type circuit is coupled to one end of the capacitor, the other end of the capacitor is grounded, a power supply terminal of the NOT-gate type circuit is connected to a power supply, a ground terminal of the NOT-gate type circuit is coupled to one end of the variable resistance circuit, and the other end of the variable resistance circuit is grounded, the NOT-gate type circuit is configured to output a low level when the pulse signal is a high level, and output a high level when the pulse signal is a low level.

A signal processing chain, such as an audio chain, produces an analog output signal from a digital input signal. The signal processing chain is operated by generating a first flag signal for the analog output signal and one or more second flag signals for the digital input signal. Each flag signal assumes a first level or a second level and is set to the first level when a signal from which the flag is generated has a value within an amplitude window. An amount the first flag signal for the analog output signal and the second flag signal for the digital input signal match each other may be calculated for issuing an alert flag which indicates an impaired operation of the signal processing chain.

An analog to digital (A/D) converter includes a capacitor array having respective first terminals selectively coupled to a reference voltage or ground via a plurality of switches and having respective second terminals coupled to a sample and hold (S/H) output. The A/D converter also includes a voltage comparator having a first input coupled to the S/H output and having a second input coupled to a bias voltage. The voltage comparator is configured to output a comparison voltage responsive to a sampled charge at the S/H output and the bias voltage. The A/D converter also includes a successive approximation register coupled to receive the comparison voltage and configured to output an approximate digital code responsive to the comparison voltage, wherein the approximate digital code is varied by controlling an equivalent capacitance of the capacitor array.

An error compensation correction device for a pipeline analog-to-digital converter includes a correction pipeline stage and a conventional pipeline stage. For each correction pipeline stage, a corresponding error estimation circuit, a level edge detection circuit, a random level generation circuit, and MUX circuit being provided. The present disclosure can track and correct non-ideal properties and mismatching errors in real time over time along with the change of the surroundings without interrupting the ADC normal work of the pipeline. Thus the correction value is closer to the real situation.

A switching circuit for checking an analog input circuit of an A/D converter is shown. The switching circuit comprises the analog circuit and a comparator circuit. The analog input circuit is configured to generate a first derived signal S1 and a second derived signal S2 from an analog input signal SE of the analog input circuit. The first derived signal S1 and the second derived signal S2 are input signals for the comparator circuit, but only the first derived signal S1 is an input signal for the A/D converter. The comparator circuit is configured to check whether a deviation of the derived signals S1, S2 from each other lies within a tolerance range TOL and to output an output signal SA depending on the check, which may be further evaluated.

An analog-to-digital conversion device includes: a switch connected to input units through signal lines to receive external voltages selecting and outputting one external voltage; an S/H circuit holding a voltage corresponding to an output of the switch; a converter performing AD conversion based on the voltage; and a controller determining the external voltage selected by the switch and performing a disconnection determination whether a disconnection occurs in the signal line. In the disconnection determination, the controller controls the switch to select a reference voltage different from the external voltage before controlling the switch to select the external voltage to be determined, and performs the disconnection determination based on a voltage difference between the reference voltage and the external voltage after controlling the switch to select the external voltage.

In an embodiment, a circuit includes first and second analog-to-digital conversion circuit path. The first analog-to-digital conversion circuit path is configured to provide first converted digital data from an analog input signal. The second analog-to-digital conversion circuit path is configured to provide second converted digital data from the analog input signal. A comparison circuit is configured to compare the first converted digital data with the second converter digital data and generate a fault based on the comparison to reveal a mismatch between the first and second converted digital data.

A safety circuit for the multi-channel processing of an input signal. The safety circuit includes an analog-to-digital conversion device having a first analog input and a second analog input and at least one digital output for processing the input signal. Furthermore, the safety circuit has a test device which is set up to apply a test signal at the first and/or second input of the A/D conversion device in such a way that the test signal superposes the input signal such that the test signal dominates the input signal.

A control system includes: a semiconductor chip, having built therein a processing part, an A/D converter and a pull device circuit; a wiring part, having one end connected to a terminal connected to the A/D converter; and a sensor, connected to the other end of the wiring part and inputting a sensor signal in analog form via the wiring part. The pull device circuit includes a switching element, and has one end connected to ground or a power supply voltage and the other end connected between the A/D converter and the terminal. The processing part includes: a switch control part, controlling the switching element to be in an on or off state; a sensor information generator, generating sensor information based on the sensor signal; and a disconnection detector, detecting disconnection of the wiring part based on output of the A/D converter when the switching element is in the on state.