A circuit includes analog input nodes and switches selectively coupling each of the analog input nodes to a capacitive node. Each of the switches is controlled by a respective bit of a channel selection word. Level shifting circuits are respectively coupled in parallel with the switches. A sampling capacitor is coupled between an output node and ground, the output node being coupled to the capacitive node. An analog to digital converter operates to digitize voltages at the output node.

A voltage detection circuit measures a plurality of cell voltages of an assembled battery configured by connecting a plurality of cells in series. The voltage detection circuit includes a plurality of input terminals connected to respective electrodes of the plurality of cells through a plurality of voltage detection lines; a multiplexer that periodically selects and outputs voltages of a plurality of cells in a group, a plurality of series cells configured as the group; an analog-to-digital (AD) converter that AD-converts an output voltage from the multiplexer and outputs digital data of the output voltage; and a control circuit that controls a timing for the selection by the multiplexer and a timing for the AD conversion. The control circuit switches over a time interval for which the multiplexer selects each of the cells to change a period of the AD conversion.

A physical quantity detection circuit includes: a detection signal generation circuit generating a detection signal, based on an output signal from a physical quantity detection element; an analog/digital converter circuit converting the detection signal into a first digital signal and converting a test signal into a second digital signal; a test signal generation circuit generating the test signal; and a malfunction diagnosis circuit diagnosing a malfunction of the analog/digital converter circuit, based on the second digital signal. A full-scale voltage of the analog/digital converter circuit is selected from among a plurality of voltages having different magnitudes, according to a power supply voltage. The test signal includes an upper limit value test signal, a lower limit value test signal, and a first intermediate value test signal. The test signal generation circuit performs resistive voltage division of the full-scale voltage and thus generates the first intermediate value test signal.

An engine control module comprises an input terminal configured to receive an input signal, an analog-to-digital converter configured to receive the input signal from the input terminal, control circuitry configured to receive the input signal from the analog-to-digital converter and to control at least one engine output based on the input signal, and an adjustable low-pass filter. The adjustable low-pass filter is coupled between the input terminal and the analog-to-digital converter such that the analog-to-digital converter receives the input signal from the input terminal via the adjustable low-pass filter. The adjustable low-pass filter is configured to filter the input signal from the input terminal prior to the input signal being applied to the analog-to-digital converter. The adjustable low-pass filter has a first setting in which the adjustable low-pass filter has a first cut-off frequency and a second setting in which the adjustable low-pass filter has a second cut-off frequency, wherein the first setting configures the engine control module to be used with a first sensor having a first dynamic range and the second setting configures the engine control module to be used with a second sensor having a second dynamic range.

The semiconductor device according to this disclosure includes an analog input terminal, an amplifier circuit, a sample-and-hold circuit, an analog input switch connected between the analog input terminal and the input terminal of the amplifier circuit, a control switch connected between the output terminal of the amplifier circuit and the input terminal of the sample-and-hold circuit, a comparison circuit connected to the output terminal of the sample-and-hold circuit, an analog-to-digital converter connected to the comparator circuit, a control circuit, and a signal conversion circuit for converting the first control signal from the control circuit into a second control signal. The analog input switch is turned on during the activation level of the second control signal. The period of the activation level of the second control signal is longer than that of the first control signal to reduce a conversion error of an analog-to-digital conversion circuit.

A switch device including a switch circuit and switch controller. The switch circuit comprises first and second switches to selectively enable a path between an input terminal and an output terminal. The switch controller refers to a selection signal and a switch signal to respectively generate a first switch control signal at a first switch control signal output terminal and a second switch control signal at a second switch control signal output terminal. When the voltage level of an input signal at the input terminal is larger than a power voltage, the switch controller generates the first switch control signal and the second switch control signal capable of turning off the switch circuit. When the voltage level of the input signal is not larger than the power voltage, the switch controller generates the first switch control signal and the second switch control signal according to the switch signal.

Methods and apparatus for power monitoring using power management integrated circuits. In some implementations, a power management integrated circuit includes multiple voltage regulators, an analog multiplexer, an analog to digital converter, power determination circuitry, and control circuitry. The analog multiplexer has multiple inputs that are each configured to receive an analog input signal indicative of an amount of electrical current output by a different one of the multiple voltage regulators. The analog-to-digital converter is configured to receive analog output signals from of the analog multiplexer and to provide a digital output. The power determination circuitry configured to determine a power output level for each of the multiple voltage regulators based on respective digital outputs of the analog-to-digital converter. The control circuitry is configured to control the analog multiplexer to periodically change which of the analog input signals is passed to the output of the analog multiplexer.

A gain amplifier of a sensing circuit for sensing degradation of an OLED display panel, the gain amplifier comprising: an operation amplifier; and a plurality of gain amplifier cells sequentially coupled to the operation amplifier. Each of the gain amplifier cells comprises a plurality of capacitors each placed between two internal nodes of the gain amplifier cell, excluding a ground node, such that a voltage gain of the gain amplifier and a DC offset of the gain amplifier are determined according to capacitances of the capacitors without considering parasitic capacitance.

A switch device including a switch circuit and switch controller. The switch circuit comprises first and second switches to selectively enable a path between an input terminal and an output terminal. The switch controller refers to a selection signal and a switch signal to respectively generate a first switch control signal at a first switch control signal output terminal and a second switch control signal at a second switch control signal output terminal. When the voltage level of an input signal at the input terminal is larger than a power voltage, the switch controller generates the first switch control signal and the second switch control signal capable of turning off the switch circuit. When the voltage level of the input signal is not larger than the power voltage, the switch controller generates the first switch control signal and the second switch control signal according to the switch signal.

An analog to digital (A/D) converter includes a capacitor array having respective first terminals selectively coupled to a reference voltage or ground via a plurality of switches and having respective second terminals coupled to a sample and hold (S/H) output. The A/D converter also includes a voltage comparator having a first input coupled to the S/H output and having a second input coupled to a bias voltage. The voltage comparator is configured to output a comparison voltage responsive to a sampled charge at the S/H output and the bias voltage. The A/D converter also includes a successive approximation register coupled to receive the comparison voltage and configured to output an approximate digital code responsive to the comparison voltage, wherein the approximate digital code is varied by controlling an equivalent capacitance of the capacitor array.