An image sensor chip includes an internal voltage generator for generating internal voltages using an external voltage received at a first terminal of the image sensor chip, a temperature sensor for generating a temperature voltage, a selection circuit for outputting one of the external voltage, the internal voltages, and the temperature voltage, a digital code generation circuit for generating a digital code using an output voltage of the selection circuit, and a second terminal for outputting the digital code from the image sensor chip.

A tracking ADC with a feed-forward loop is disclosed. The tracking ADC includes a feedback circuit configured to generate a feedback signal using an input voltage and a comparison circuit configured to sample, using a plurality of threshold values, the feedback signal to generate a plurality of samples. A counter circuit is configured to update a count value using a subset of the plurality of samples. A digital-to-analog converter (DAC) circuit configured to generate a control signal using the count value. The feedback circuit is further configured to modify the feedback signal using the control signal and at least one of the plurality of samples. By modifying the feedback voltage, the settling time may be reduced, allowing the ADC to be run at a higher clock speed.

Systems and methods are disclosed for magnetoresistive asymmetry compensation using a hybrid analog and digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end (CTFE) circuit, and performing, via the CTFE circuit, first magnetoresistive asymmetry (MRA) compensation on the analog signal to adjust the dynamic range of the analog signal based on an input range of an analog-to-digital converter (ADC). The method may further comprise converting the analog signal to a digital sample sequence via the ADC, and performing, via a digital MRA compensation circuit, second MRA compensation to correct residual MRA in the digital sample sequence. Offset compensation may also be performed in both the analog and digital domains.

Embodiments of the disclosure provide a system, method, or computer readable medium for providing a differentiable content addressable memory (aCAM) that implements an analog input analog storage and analog output learning memory. The analog output of the differentiable CAM can provide input to a learning algorithm, which may compute the gradients in comparison to historic values and reduce data inaccuracies and power consumption.

A microphone assembly includes a transducer and a processing circuit. The processing circuit includes an analog-to-digital converter (ADC) configured to receive, sample and quantize an electrical signal generated by the transducer to generate a corresponding digital signal. The processing circuit includes a feedback path including a digital loop filter configured to receive and filter the digital signal to provide a first digital feedback signal and a digital-to-analog converter (DAC) configured to convert the first digital feedback signal into a corresponding analog feedback signal. The processing circuit additionally includes a summing node configured to combine the electrical signal and the analog feedback signal.

A magnetometer includes a measurement value transducer that supplies a signal to a first amplifier device; a summation element that reduces an output signal range of an output signal of the first amplifier device; a second amplifier device that amplifies an output signal of the summation element; a low-pass filter filtering an output signal of the second amplifier device; an analog-digital converter converting output of the filter into digital form; and a correction element that divides the digital signal by a correction factor that corresponds to the defined gain factor of the second amplifier device and adds a digital correction signal to the quotient to form a resulting signal, where a scope of the correction signal corresponds to the defined attenuation of the output signal of the first amplifier device.

A multi-stage comparator includes a first stage circuit, a second stage circuit, and a control circuit. The first stage circuit receives an input signal of the multi-stage comparator, generates a first-stage output signal according to the input signal, and outputs the first-stage output signal at an output port of the first stage circuit. The second stage circuit receives a second-stage input signal at an input port of the second stage circuit, and performs a second-stage operation to generate an output signal of the multi-stage comparator. The control circuit is coupled between the output port of the first stage circuit and the input port of the second stage circuit, and controls a start time of the second-stage operation.

A successive approximation register, SAR, analog-to-digital converter, ADC, (400) is described. The SAR ADC (400) includes: an analog input signal (410); an ADC core (414) configured to receive the analog input signal (410) and comprising: a digital to analog converter, DAC (430) located in a feedback path; and a SAR controller (418) configured to control an operation of the DAC (430), wherein the DAC (430) comprises a number of DAC cells, arranged to convert a digital code from the SAR controller (418) to an analog form; a digital signal reconstruction circuit (450) configured to convert the digital codes from the SAR controller (418) to a binary form; and an output coupled to the digital signal reconstruction circuit (450) and configured to provide a digital data output (460). The DAC (430) is configurable to support at least two mapping modes, including a small signal mapping mode of operation; and the SAR controller (418) is configured to identify when the received analog signal is a small signal level, and in response thereto re-configure the DAC (430) and the digital signal reconstruction circuit (450) to implement a small signal mapping mode of operation.

Performing a temperature measurement operation includes a first phase and a second phase. The first phase includes providing a voltage indicative of a measured temperature to a first input of a comparator, providing a ramp signal to a second input of the comparator, and generating at an output of the comparator, pulses based on a comparison of the first input to the second input of the comparator. The second phase includes providing the voltage indicative of a measured temperature to the second input of the comparator, providing the ramp signal to the first input of the comparator, and generating at an output of the comparator, pulses based on a comparison of the first input to the second input of the comparator. Performing the temperature measurement operation also includes utilizing the pulses generated during the first and second phases to provide a digital indication of the measured temperature.

A thermistor drive circuit includes a plurality of driving resistors, at least one current correction resistor, a voltage measurement unit and a controller. The driving resistors are selectively connected to a thermistor for correcting a temperature characteristic of the thermistor whose resistance value changes in accordance with a temperature to be detected. The current correction resistor is selectively connected between a power supply and a ground. The voltage measurement unit measures a terminal voltage of the thermistor. The controller switches connection states of the driving resistors according to the terminal voltage. When switching the connection states of the driving resistors, the controller also switches a connection state of the current correction resistor to suppress a fluctuation of a power supply current before and after the switching of the connection states of the driving resistors.