An electrical circuit for conditioning an analog electrical input signal into an analog electrical output signal includes a threshold circuit. The threshold circuit is configured to set a value of a conditioning parameter, under control of the analog electrical input signal and based on an electrical threshold. The threshold circuit is configured to set the conditioning parameter to, in response to the analog electrical input signal being below the electrical threshold, a first value. The threshold circuit is configured to set the conditioning parameter to, in response to the analog electrical input signal exceeding the electrical threshold, a second value different from the first value.

A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.

A system may include a plurality of processing paths having a first path configured to generate a first digital signal based on an analog input signal and a second path configured to generate a second digital signal based on the analog input signal, the second path having a high-pass filter for filtering the analog input signal prior to the analog input signal being processed by the remainder of the second path, and the high-pass filter having a corner frequency. Control circuitry may be configured to determine frequency-dependent weighted proportions of the first and second digital signals to be combined into an output digital signal based on a characteristic of the analog input signal. Frequency-dependent weighted proportions may be such that the digital output signal includes spectral content of the first digital signal below the corner frequency to account for spectral content of the second digital signal below the corner frequency being filtered.

A system may include an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a variable resistor coupled to the output and having a plurality of modes including a first mode in which the variable resistor has a first resistance and a second mode in which the variable resistor has a second resistance, and control circuitry configured to determine a difference between the input signal and the output signal and switch between modes of the plurality of modes when the difference is less than a predetermined threshold.

A signal processing device includes a comparison unit to compare a signal level of an analog signal with a signal level of a reference signal; a selection unit configured to select the reference signal to be supplied to the comparison unit; and a switching unit capable of switching a signal line connected to an input terminal of the comparison unit such that a signal line via which the selected reference signal is transmitted is connected to the input terminal of the comparison unit, wherein the comparison unit includes a floating node as the input terminal, the selection unit includes a signal line in which a parasitic capacitance is caused between the signal line and the floating node as the input terminal of the comparison unit, and the signal line of the selection unit is configured to transmit an identical level of signal in multiple comparison processes of the comparison unit.

In a first sensitivity level, an AD converter performs AD conversion selectively using, in accordance with the level of the analog signal, any one of a first reference signal and a second reference signal that have mutually different slopes, and in a second sensitivity level that is different from the first sensitivity level, the AD converter performs AD conversion only using a third reference signal.

A system includes an analog-to-digital converter receiving a plurality of input signals. One particular input signal has a particular analog value and the analog-to-digital converter uses a fixed reference to convert the particular analog value to a particular digital value. The analog-to-digital converter uses the particular analog value as a reference for converting the analog values of the remaining input signals.

A system may include an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a variable resistor coupled to the output and having a plurality of modes including a first mode in which the variable resistor has a first resistance and a second mode in which the variable resistor has a second resistance, and control circuitry configured to determine a difference between the input signal and the output signal and switch between modes of the plurality of modes when the difference is less than a predetermined threshold.

The present technology relates to a signal processing device, an imaging element, and an electronic apparatus configured so that a cost increase can be suppressed. A signal processing device of the present technology includes: a comparison unit configured to compare a signal level of an analog signal with a signal level of a reference signal; a selection unit configured to select, from a plurality of reference signals, the reference signal to be supplied to the comparison unit; and a switching unit capable of switching a signal line connected to an input terminal of the comparison unit such that a signal line via which the reference signal selected by the selection unit is transmitted is connected to the input terminal of the comparison unit, wherein the comparison unit includes a floating node as the input terminal, the selection unit includes a signal line in which a parasitic capacitance is caused between the signal line and the floating node as the input terminal of the comparison unit, and the signal line of the selection unit is configured to transmit an identical level of signal in multiple comparison processes performed by the comparison unit. The present technology is applicable to, e.g., an imaging element and an electronic apparatus.

An A/D converter includes: an input unit configured to receive an analog input signal, a preprocessing unit configured to convert the input signal into a digital preprocessing signal based on a dynamic range of the input signal and a first resolution corresponding to a predetermined first bit number, a first conversion unit configured to convert the preprocessing signal into a first output signal based on a second resolution corresponding to a second bit number smaller than the first bit number, and a second conversion unit configured to convert the preprocessing signal into a second output signal based on a third resolution corresponding to a third bit number which is smaller than the first bit number and is different from the second bit number.

In a first sensitivity level, an AD converter performs AD conversion selectively using, in accordance with the level of the analog signal, any one of a first reference signal and a second reference signal that have mutually different slopes, and in a second sensitivity level that is different from the first sensitivity level, the AD converter performs AD conversion only using a third reference signal.

An A/D converter includes: an input unit configured to receive an analog input signal, a preprocessing unit configured to convert the input signal into a digital preprocessing signal based on a dynamic range of the input signal and a first resolution corresponding to a predetermined first bit number, a first conversion unit configured to convert the preprocessing signal into a first output signal based on a second resolution corresponding to a second bit number smaller than the first bit number, and a second conversion unit configured to convert the preprocessing signal into a second output signal based on a third resolution corresponding to a third bit number which is smaller than the first bit number and is different from the second bit number.