An analog signal generating source comprising two or more digital-to-analog converters (DAC) combined to generate one or more frequency components. The analog signal source comprises a first path for generating substantially low frequency signals, the first path comprising a first one of the DACs; and a second path for generating substantially high frequency signals, the second path comprising a second one of the DACs. The analog signal source also comprises a data processor for processing an input signal and providing the processed input signal to the first and second paths; a combining circuit configured to combine outputs of the first and second paths into the source signal; a feedback portion configured to sense the source signal; and a servo loop configured to use the sensed source signal to adjust as need to maintain the source signal to substantially agree with the input signal.

A measurement system includes a gain chain configured to amplify an analog input signal; a range selector configured to select a gain between the analog input signal and a plurality of analog-to-digital converter (ADC) outputs from a plurality of ADCs, wherein each ADC output has a path, and a gain of each output path is made up of a plurality of gain stages in the gain chain; and a mixer configured to combine the plurality of ADC outputs into a single mixed output.

There is described a switchable microphone device which may be switched between a digital output mode and an analog output mode. There is further described a system for use of such a device, which allows for the switching between analog and digital computing modes.

There is provided a method and system for linear signal processing with signal decomposition. The system including: a decomposition module to receive an analog input signal and perform signal decomposition, the signal decomposition including slicing the analog input signal into a plurality of slices to produce one or more analog components and one or more digital components, the decomposition module directing each component to a separate signal path; and a processing module to perform one or more linear operations on at least one of the signal paths. In some cases, the signal decomposition includes slicing the analog input signal into the plurality of slices by amplitude. In some cases, the analog components include unsaturated slices of the analog input signal and the digital components include saturated slices of the analog input signal.

The value range for which an error in a digital signal can be corrected is expanded. A control unit generates characteristic information indicating the relationship between an input and an output of an A/D converter and sets a value range. The control unit, in a case in which a value indicated by a first digital signal obtained by the A/D converter converting a first analog voltage signal is within the value range, A/D converts the first analog voltage signal and generates corrected digital information on the basis of the first digital signal and characteristic information, and in a case in which a value indicated by the first digital signal is not within the value range, A/D converts the first analog voltage signal and generates corrected digital information on the basis of a second digital signal obtained by the A/D converter converting the second analog voltage signal and characteristic information.

Embodiments of methods and systems for gain control in a communications device are described. In an embodiment, a method for gain control in a communications device involves detecting a change in an amplification gain that is applied to an analog signal in the communications device and compensating for the change in the amplification gain by manipulating an amplitude of a digital signal that is converted from the analog signal. Other embodiments are also described.

This application relates to ADC circuitry. An ADC circuit (200) has first and second conversion paths (201a, 201b) for converting analogue signals to digital and is operable in first and second modes. In the first mode, the first and second conversion paths are connected to respective first and second input nodes (202a, 202b) to receive and convert full scale first and second analogue input signals (Ain1, Ain2) to separate digital outputs (Dout1, Dout2). In the second mode, the first and second conversion paths are both connected to the first input node (202a), to convert the first analogue input signal (Ain1) to respective first and second digital signals, and the first and second conversion paths are configured for processing different signal levels of the first analogue input signal. A selector (207) select the first digital signal or the second digital to be output as an output signal based on an indication of amplitude of the first analogue input signal.

The present invention provides a receiving circuit, wherein the receiving circuit includes a first ADC, an attenuator, a second ADC, a harmonic generation circuit and an output circuit. In the operations of the receiving circuit, the first ADC performs an analog-to-digital operation on an analog input signal to generate a first digital output signal, the attenuator reduces strength of the analog input signal to generate an attenuated analog input signal, the second ADC performs the analog-to-digital operation on the attenuated analog input signal to generate a second digital input signal, the harmonic generation circuit generates at least one harmonic signal according to the second digital input signal, and the output circuit deletes a harmonic component of the first digital input signal by using the at least one harmonic signal to generate an output signal.

Apparatus includes an ADC configured to convert an analog signal to a digital signal, a comparator having a first input responsive to the analog signal, a second input responsive to the digital signal, and an output at which a comparison signal is provided, and an output checker configured to process the comparison signal to generate a fault signal indicative of whether a fault has occurred in the ADC. The comparator can be an analog comparator in which case the digital signal is converted to an analog signal for the comparison or a digital comparator in which case an additional ADC is provided to convert the analog signal into a digital signal for the comparison. Embodiments include more than one ADC in which case summation elements are provided to sum the analog signals and the digital signals for the comparison.

A device for receiving RF signal is provided. The device includes a receiving component configured to receive a radio frequency (RF) signal and a sampling component configured to sample the RF signal. The sampling component may include a plurality of filters, a demultiplexer, a clock synthesizer, an analog-to-digital converter (ADC), and a digital signal processing device. The sampling component may obtain an intermediate frequency (IF) signal based on the plurality of filters, the demultiplexer, the clock synthesizer, the ADC, and the digital signal processing device.