A system for determining an amplitude of a sinusoidal output waveform from a sensor includes a controller configured to provide a sample signal having a sample frequency that is four times a frequency of a sinusoidal excitation waveform provided to the sensor. The sensor has inductively-coupled primary and secondary windings that produce the sinusoidal output waveform from the secondary winding when the excitation waveform is provided to the primary winding. An analog-to-digital converter measures a first and second voltage of the sensor waveform separated in time by the period of the sample frequency, and the system calculates the amplitude based on the measurements of the first and second voltages.

A control system includes an encoder and a control device that controls a target object. The encoder includes a position information generating unit that generates position information made of a predetermined amount of data and including absolute position data of an object to be detected; a configuration information generating unit that generates configuration information representing a ratio of the absolute position data in the amount of data during serial communication; and a transmission unit that transmits, to the control device, the position information and the configuration information as serial data. The control device includes a reception unit that receives the position information and the configuration information transmitted from the encoder; a storage unit that stores the received configuration information; and a notification unit that performs notification of a configuration mismatch when the stored configuration information does not match the next received configuration information.

A resolver system includes a rotatable primary winding, a secondary winding fixed relative to the rotatable primary winding, a tertiary winding fixed relative to the rotatable primary winding and positioned /2 radians out of phase with respect to the fixed secondary winding, an excitation module electrically connected to the rotatable primary winding and configured to provide an excitation signal to the rotatable primary winding where the excitation signal is an alternating current waveform having a fundamental frequency, and a controller electrically connected to the secondary winding and configured to sample a voltage across the secondary winding at 18 times the fundamental frequency, sample a voltage across the tertiary winding at 18 times the fundamental frequency, and determine an amplitude of the fundamental frequency based on the sampled voltages across the secondary and tertiary windings, where the alternating current waveform includes a third harmonic frequency.

In a semiconductor device, a sine wave signal is input to a first input part and a cosine wave signal is input to a second input part. A multiplexer alternately selects one of the sine wave signal and the cosine wave signal. An analog to digital converter converts the output signal of the multiplexer into a digital value. A switching circuit is coupled between at least one of the first and second input parts and the multiplexer. The switching circuit is configured to be able to invert the input sine wave signal or the input cosine wave signal, in order to reduce the angle detection error due to the non-linearity error of the A/D converter.

Various embodiments provide a filter for propagation delay compensation and interpolation in encoder digital signal processing. The filter can include a first low pass filter configured to reduce noise of a digital input comprising a measured angular position; a first differentiator configured to receive a filtered digital input and to calculate a speed from a difference in time of the measured angular position and a previous angular position; a second low pass filter configured to reduce noise from the speed; a second differentiator configured to receive a filtered speed and to calculate acceleration using a difference in time of the filtered speed and a previous speed; a third low pass filter configured to reduce noise of the acceleration; and a delay compensator configured to receive the filtered digit input, the filtered speed, and a filtered acceleration, and to calculate a propagation delay compensated digital output.

An apparatus includes a coarse resolver configured to output coarse position signals indicative of a coarse position of a drive shaft of a motor. The apparatus also includes a fine resolver configured to output fine position signals indicative of a fine position of the drive shaft of the motor. The apparatus further includes a control circuit. The control circuit is configured to receive the coarse position signals from the coarse resolver and the fine position signals from the fine resolver and generate an initial position output, based on the coarse position signals, that indicates an initial position of the drive shaft. The control circuit is further configured to generate a subsequent position output, based on the fine position signals, that indicates a subsequent position of the drive shaft.

Demodulation circuitry includes an input terminal configured to be coupled to an analog-to-digital converter (ADC) and configured to receive a plurality of ADC outputs. The plurality of ADC outputs are generated based on resolver outputs. The demodulation circuitry also includes a rectifier configured to rectify the plurality of ADC outputs. Rectifying the plurality of ADC outputs preserves a phase of the plurality of ADC outputs. The demodulation circuitry includes amplitude determination circuitry configured to determine, based on the rectified plurality of ADC outputs, demodulated amplitude values corresponding to the resolver outputs. The demodulation circuitry further includes angle computation circuitry configured to generate position outputs based on the demodulated amplitude values.

The present invention provides a signal processor that improves a resolution of a phase detection without increasing a clock frequency of a controller or decreasing a frequency of an excitation signal. A signal processor 10 includes a comparator 11 that compares a signal obtained by phase modulating a carrier frequency at a rotor rotation angle of a resolver with a dither signal.

Various embodiments provide a filter for propagation delay compensation and interpolation in encoder digital signal processing. The filter can include a first low pass filter configured to reduce noise of a digital input comprising a measured angular position; a first differentiator configured to receive a filtered digital input and to calculate a speed from a difference in time of the measured angular position and a previous angular position; a second low pass filter configured to reduce noise from the speed; a second differentiator configured to receive a filtered speed and to calculate acceleration using a difference in time of the filtered speed and a previous speed; a third low pass filter configured to reduce noise of the acceleration; and a delay compensator configured to receive the filtered digit input, the filtered speed, and a filtered acceleration, and to calculate a propagation delay compensated digital output.

A compact resolver pre-amplification assembly has first and second printed circuit boards. The boards include an interface with an N/N1 resolver and a resolver-to-digital converter and three signal paths. The first and second circuit boards are contained in a single package configured for mounting on a robotic joint while providing high amplification and noise rejection. Low level sensitive signal are separated from high level excite signals by locating sensitive signals on the first board and excite signals on the second board.