A device of integration of an electric current received on an integration node, includes an operational amplifier, an integration capacitor, and a circuit for modifying an output voltage of the operational amplifier formed by a charge transfer circuit configured to be connected on the integration node and to transfer charges into the integration capacitor. The device also includes a comparison circuit configured to trigger the modification circuit at least once during the integration duration, and a storage circuit configured to store the number of triggerings which have occurred during the integration duration. The received electric current is calculated according to the output voltage as well as to the number of triggerings multiplied by the modification of the output voltage induced by the modification circuit.

An optical sensor arrangement comprises a photodiode and a converter arrangement including an integration amplifier, a comparator amplifier, an integration capacitor and a result register. During a precharge phase the result register is set to a starting value. During an integration phase a current is sampled through the photodiode to update the result register in response to down charges applied to an input of the integration amplifier. During a residue phase the result register is updated in dependence on the charge remaining on the integration capacitor. Measuring the residual charge increases resolution and accuracy of the converter.

An optical sensor arrangement comprises a photodiode and a converter arrangement including an integration amplifier, a comparator amplifier, an integration capacitor and a result register. During a precharge phase the result register is set to a starting value. During an integration phase a current is sampled through the photodiode to update the result register in response to down charges applied to an input of the integration amplifier. During a residue phase the result register is updated in dependence on the charge remaining on the integration capacitor. Measuring the residual charge increases resolution and accuracy of the converter.

A method includes receiving analog body-surface signal from body-surface electrode, and multiple analog unipolar signals from multiple unipolar electrodes of an invasive probe. A first unipolar electrode is assigned to serve as a common electrical ground and a common timing reference for the analog unipolar signals and the analog body-surface signal. The analog unipolar signals are digitized to produce digital unipolar signals sampled relative to a digital ground. Defined are an analog bipolar signal between the first unipolar electrode and a second unipolar electrode of the probe, and digital bipolar signal formed from the first unipolar electrode and the second unipolar electrode. Ground and timing offsets between the analog bipolar signal and the digital bipolar signal are estimated, while the first unipolar electrode is connected to the digital ground. The ground offset and the timing offset are applied in measuring a third unipolar signal, sensed by a third unipolar electrode.

A light-to-digital converter (2) comprises a light-to-current converter (10); a current integrator (4) with an integrator output (30) resettable to a baseline level; and a counter (18) with a digital output (26), wherein the light-to-current converter (10) is switchably connectable as a positive integration input to the current integrator (4), for, during a light-collecting phase (404-406), integrating a current from the light-to-current converter (10), the integrator output (30) starting from the baseline value and ending at a value to be digitized; a reference current source (14) is switchably connectable as a negative integration input to the current integrator (4), for, during a counting phase (406-408) subsequent to the light-collecting phase (404-406), integrating a reference current from the reference current source (14), the integrator output (30) starting from the value to be digitized and ending at the baseline value, the time spent integrating the reference current corresponding to the value to be digitized; and the counter (18) is configured for measuring the time.

A sensor that is capable of detecting a pulse of a user by using a proximity illumination sensor or a proximity sensor is provided. A proximity sensor (14) that includes a pulse detection function includes a count adjustment circuit (5) that performs adjustment such that a digital output value (ADCOUT1) from an analog-digital conversion circuit (4) changes in accordance with each value of a distance at least in a prescribed range of the distance between a photodiode (2) and a detected object (a finger in the drawing) and a digital filter (6) for detecting a cycle of the digital output value (ADCOUT1) from the analog-digital conversion circuit (4).

A method for operating a gas sensor arrangement comprises generating a sensor current by means of a gas sensor and converting the sensor current into a digital comparator output signal in a charge balancing operation depending on a first clock signal. An asynchronous count comprising an integer number of counts is determined from the digital comparator output signal and depending on the first clock signal. Furthermore, a fractional time count depending on a second clock signal is determined from the digital comparator output signal. Finally, a digital output signal is calculated from the asynchronous count and from the fractional time count. The digital output signal is indicative of the sensor current generated by the gas sensor.

A method for operating a gas sensor arrangement comprises generating a sensor current by means of a gas sensor and converting the sensor current into a digital comparator output signal in a charge balancing operation depending on a first clock signal. An asynchronous count comprising an integer number of counts is determined from the digital comparator output signal and depending on the first clock signal. Furthermore, a fractional time count depending on a second clock signal is determined from the digital comparator output signal. Finally, a digital output signal is calculated from the asynchronous count and from the fractional time count. The digital output signal is indicative of the sensor current generated by the gas sensor.

A system and method for regulating transfer characteristics of an integral analog-to-digital converter are provided. The system comprises a cascade N-stage integrator structure having N integrators, the input end of the first integrator is connected to a voltage, the output end of each integrator is connected to the input end of the adjacent integrator, and the output end of the Nth integrator is connected to an output node (VRAMP). Wherein, the N is positive integer greater than or equal to 2. In the cascade multistage integrator structure, the voltage of the output node (VRAMP) is in direct proportion relation with the time to the power of N. By adopting a cascade multistage integrator according to the present disclosure, it is simple to regulate transfer characteristics of the ADC, and the cascade digital signal processing is convenient, which can reduce the ADC conversion time and improve the ADC conversion rate. Compared with the existing polyline mode, the present disclosure has better linearity; and it can be easily extended to cascade multistage integrators.

A system and method for regulating transfer characteristics of an integral analog-to-digital converter are provided. The system comprises a cascade N-stage integrator structure having N integrators, the input end of the first integrator is connected to a voltage, the output end of each integrator is connected to the input end of the adjacent integrator, and the output end of the Nth integrator is connected to an output node (VRAMP). Wherein, the N is positive integer greater than or equal to 2. In the cascade multistage integrator structure, the voltage of the output node (VRAMP) is in direct proportion relation with the time to the power of N. By adopting a cascade multistage integrator according to the present disclosure, it is simple to regulate transfer characteristics of the ADC, and the cascade digital signal processing is convenient, which can reduce the ADC conversion time and improve the ADC conversion rate. Compared with the existing polyline mode, the present disclosure has better linearity; and it can be easily extended to cascade multistage integrators.