A method and system of an analog to digital conversion having an exponential result are provided. An analog input signal is received by the ramp ADC. The analog input signal is converted into an N-bit digital signal having a linear relationship with the analog input signal. An internal gated clock signal is generated based on the received first clock signal. The gated clock signal is used as an input to an M-bit register. An output of the M-bit register is multiplied by a predetermined factor. The product of the multiplication is provided as an input to the M-bit register. The output of the M-bit register provides an M-bit output having an exponential relationship with the analog input signal.

A slope analog-to-digital converter, ADC, for converting an analog input signal to a digital representation, said slope ADC comprising: a comparator configured to compare two input signals, wherein a sampled value of the analog input signal and a slope signal are used in forming the two input signals; a memory element, which is configured to receive a trigger signal based on the comparator identifying a change in which of the two input signals is higher, and a counter signal, wherein a value of the counter signal when the trigger signal is received provides the digital representation of the sampled value of the analog input signal; wherein the slope signal and the counter signal have a nonlinear relationship, wherein the nonlinear relationship is adapted to improve linearity of a transfer function of the slope ADC for converting the analog input signal to the digital representation.