An analog to digital converter is provided and includes column processing units that convert analog signal to digital signal. One or more counters count time of analog to digital conversion and one or more comparators compares the voltage of reference signal and analog signal from neuromorphic device. One or more generators generates the reference signal for the comparator.

An analog to digital converter is provided and includes column processing units that convert analog signal to digital signal. One or more counters count time of analog to digital conversion and one or more comparators compares the voltage of reference signal and analog signal from neuromorphic device. One or more generators generates the reference signal for the comparator.

Methods and systems for performing analog-to-digital conversion is provided. In one example, an analog-to-digital converter (ADC) circuit comprises a leakage compensation circuit and a quantizer. The leakage compensation circuit is configured to: receive an input signal, the input signal being susceptible to a drift due to a charge leakage; receive a reference signal; and generate a leakage-compensated signal pair to compensate for the charge leakage, wherein the leakage-compensated signal pair comprises one of: (a) a leakage-compensated version of the input signal and the reference signal, (b) the input signal and a leakage-compensated version of the reference signal, or (c) a leakage-compensated version of the input signal and a leakage-compensated version of the reference signal. The quantizer is configured to perform a leakage-compensated quantization of the input signal based on the leakage-compensated signal pair to generate a digital output representing the input signal.

A disclosed linearization circuit includes a reference component, a charging and discharging controller, and a comparator circuit. The reference component has a non-linear dependence on current or voltage. The charging and discharging controller is configured to control alternating charging and discharging of the reference component. A voltage associated with the reference component forms a reference signal. The charging and discharging are controlled such that the reference signal has a periodic time dependence. The reference signal and a measurement signal are received by the comparator circuit. The comparator circuit is configured to generate and output a square-wave signal based on a reference time point during a charge-discharge cycle, and based on a result of a comparison of the reference signal with the measurement signal, such that the square-wave signal represents a linearized output signal. This disclosure further relates to a corresponding method.

A disclosed linearization circuit includes a reference component, a charging and discharging controller, and a comparator circuit. The reference component has a non-linear dependence on current or voltage. The charging and discharging controller is configured to control alternating charging and discharging of the reference component. A voltage associated with the reference component forms a reference signal. The charging and discharging are controlled such that the reference signal has a periodic time dependence. The reference signal and a measurement signal are received by the comparator circuit. The comparator circuit is configured to generate and output a square-wave signal based on a reference time point during a charge-discharge cycle, and based on a result of a comparison of the reference signal with the measurement signal, such that the square-wave signal represents a linearized output signal. This disclosure further relates to a corresponding method.

An analog to digital converter is provided and includes column processing units that convert analog signal to digital signal. One or more counters count time of analog to digital conversion and one or more comparators compares the voltage of reference signal and analog signal from neuromorphic device. One or more generators generates the reference signal for the comparator.

A disclosed linearization circuit includes a reference component, a charging and discharging controller, and a comparator circuit. The reference component has a non-linear dependence on current or voltage. The charging and discharging controller is configured to control alternating charging and discharging of the reference component. A voltage associated with the reference component forms a reference signal. The charging and discharging are controlled such that the reference signal has a periodic time dependence. The reference signal and a measurement signal are received by the comparator circuit. The comparator circuit is configured to generate and output a square-wave signal based on a reference time point during a charge-discharge cycle, and based on a result of a comparison of the reference signal with the measurement signal, such that the square-wave signal represents a linearized output signal. This disclosure further relates to a corresponding method.

A disclosed linearization circuit includes a reference component, a charging and discharging controller, and a comparator circuit. The reference component has a non-linear dependence on current or voltage. The charging and discharging controller is configured to control alternating charging and discharging of the reference component. A voltage associated with the reference component forms a reference signal. The charging and discharging are controlled such that the reference signal has a periodic time dependence. The reference signal and a measurement signal are received by the comparator circuit. The comparator circuit is configured to generate and output a square-wave signal based on a reference time point during a charge-discharge cycle, and based on a result of a comparison of the reference signal with the measurement signal, such that the square-wave signal represents a linearized output signal. This disclosure further relates to a corresponding method.

Methods and systems for performing analog-to-digital conversion is provided. In one example, an analog-to-digital converter (ADC) circuit comprises a leakage compensation circuit and a quantizer. The leakage compensation circuit is configured to: receive an input signal, the input signal being susceptible to a drift due to a charge leakage; receive a reference signal; and generate a leakage-compensated signal pair to compensate for the charge leakage, wherein the leakage-compensated signal pair comprises one of: (a) a leakage-compensated version of the input signal and the reference signal, (b) the input signal and a leakage-compensated version of the reference signal, or (c) a leakage-compensated version of the input signal and a leakage-compensated version of the reference signal. The quantizer is configured to perform a leakage-compensated quantization of the input signal based on the leakage-compensated signal pair to generate a digital output representing the input signal.

A device for generating a ramp signal with a changing slope is disclosed. The device may comprise a processor configured to generate a variable signal. The device may also comprise a phase-locked loop (PLL) circuit configured to receive the variable signal and a reference clock signal, generate a changing ramp clock signal based on the variable signal and the reference clock signal, and output the generated changing ramp clock signal as an input of an analog-to-digital-converter (ADC) circuit.