A programmable resistance circuit provides a selected resistance by configuring a reference resistor to exhibit an effective resistance, in an operational sense, by achieving an average output voltage between a source line and a return line in the programmable resistance circuit. The average output voltage corresponds to the effective resistance. The effective resistance is achieved by utilizing a modulated voltage source to bias a transistor and intermittently draw current across the reference resistor according to the duty cycle of the modulated voltage source. A programmed resistance circuit can produce a selected resistance corresponding to button selection zones of a vehicle user interface when connected to a remote circuit that acts according to a user selection.

A programmable resistance circuit provides a selected resistance by configuring a reference resistor to exhibit an effective resistance, in an operational sense, by achieving an average output voltage between a source line and a return line in the programmable resistance circuit. The average output voltage corresponds to the effective resistance. The effective resistance is achieved by utilizing a modulated voltage source to bias a transistor and intermittently draw current across the reference resistor according to the duty cycle of the modulated voltage source. A programmed resistance circuit can produce a selected resistance corresponding to button selection zones of a vehicle user interface when connected to a remote circuit that acts according to a user selection.

Differential circuitry including first and second current paths each including a succession of first and further load nodes, each successive further load node connected to its preceding load node via a divider impedance; and first switching circuitry connected to the further load node or nodes of the first current path, and second switching circuitry connected to the further load node or nodes of the second current path, the first and second switching circuitry controlling a magnitude of controllable current signals passing through the load nodes of the first current path and the second current path, respectively, wherein: the first load nodes of the first and second current paths include a first pair of load nodes, and the or each successive further load node of the first current path and its corresponding successive further load node of the second current path include a successive further pair of load nodes.

Differential circuitry including first and second current paths each including a succession of first and further load nodes, each successive further load node connected to its preceding load node via a divider impedance; and first switching circuitry connected to the further load node or nodes of the first current path, and second switching circuitry connected to the further load node or nodes of the second current path, the first and second switching circuitry controlling a magnitude of controllable current signals passing through the load nodes of the first current path and the second current path, respectively, wherein: the first load nodes of the first and second current paths include a first pair of load nodes, and the or each successive further load node of the first current path and its corresponding successive further load node of the second current path include a successive further pair of load nodes.

An analog signal processing module includes a processor and a comparator circuit module having a comparator circuit input and a comparator circuit output, the comparator circuit module being configured to receive a first analog signal at the comparator circuit input and generate a digital output, wherein the comparator circuit output is connected to the processor. A digital-to-analog converter (DAC) module is configured to receive a digital output from the processor and convert the digital output to a second analog signal. An operational amplifier (OpAmp) circuit module has an OpAmp circuit input and an OpAmp circuit output, the OpAmp circuit module being configured to receive the second analog signal at the OpAMp circuit input. A feedback loop is formed by the processor, the DAC module, and the OpAMp circuit module, and is configured to implement an amplification function or attenuation function performed by the OpAmp circuit module.

An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) having a resistor network. The resistor network includes a first and second segments. The first segment includes a first switch coupled between a first supply voltage node and a first set of resistors. The second segment includes a second switch coupled between the first supply voltage node and a second set of resistors. The first segment includes a third switch coupled in series with a second resistor. The series-combination of the third switch and second resistor coupled in parallel with at least one resistor of the first set of resistors. The second segment includes a fourth switch coupled in series with a third resistor. The series-combination of the fourth switch and third resistor is coupled in parallel with at least one resistor of the second set of resistors.

Methods and apparatus for common-mode current removal in a digital-to-analog converter (DAC). An example DAC circuit generally includes a plurality of current-steering cells, a resistor ladder circuit coupled to the plurality of current-steering cells, a first current sink coupled between a shunt branch of the resistor ladder circuit and a reference potential node for the DAC circuit, and a second current sink coupled between a first output of the DAC circuit and the reference potential node.

An analog signal processing module includes a processor and a comparator circuit module having a comparator circuit input and a comparator circuit output, the comparator circuit module being configured to receive a first analog signal at the comparator circuit input and generate a digital output, wherein the comparator circuit output is connected to the processor. A digital-to-analog converter (DAC) module is configured to receive a digital output from the processor and convert the digital output to a second analog signal. An operational amplifier (OpAmp) circuit module has an OpAmp circuit input and an OpAmp circuit output, the OpAmp circuit module being configured to receive the second analog signal at the OpAMp circuit input. A feedback loop is formed by the processor, the DAC module, and the OpAMp circuit module, and is configured to implement an amplification function or attenuation function performed by the OpAmp circuit module.

A signal converter includes a first converter, a second converter, a signal generator, and a controller. The first converter generates a first analog signal from a digital signal, and the second converter generates a second analog signal from the digital signal. The signal generator outputs a converted analog signal based on the first analog signal and the second analog signal. The controller generates one or more control signals to change a power supply state of at least one of the first converter and the second converter. The change in power supply state suppress even order harmonics.

An electronic device includes a digital-to-analog converter coupled to receive a reference voltage and a binary-encoded digital input signal. The electronic device provides an analog output signal that represents the value of the binary-encoded digital input signal and a transmission gate is coupled to pass the analog output signal. A blank pulse generator is coupled to receive selected bits of the binary-encoded digital input signal and to pulse the transmission gate off when the selected bits change value, thus providing a blanked analog output signal.