Pulse width modulation (PWM) driver circuitry comprising: a loop filter configured to receive an analog input signal and to output a digital loop filter output signal based on the analog input signal and an analog feedback signal; and a PWM modulator configured to receive a digital signal based on the digital loop filter output signal and to output a PWM signal, wherein the PWM driver circuitry further comprises a feedback path coupled to an output of the PWM driver circuitry for the analog feedback signal.

A combinational circuit (e.g., multiplexer or demultiplexer) comprises a sub-circuit that comprises first and second current paths from an input of the combinational circuit to an output of the combinational circuit, such that substantially all input current at the input of the combinational circuit is conducted by the sub-circuit via the first and second current paths to the output of the combinational circuit. The first current path comprises a first inductor and a first switch; and the second current path comprises a second inductor and a second switch. The first inductor is part of an output LC transmission line of the sub-circuit; the second inductor is part of an input LC transmission line of the sub-circuit; and the first and second inductors are sized such that parasitic capacitances of the first and second switches are substantially absorbed by the input and output LC transmission lines.

Methods and systems are provided for spreading spectral density of pulse streams during digital to analog conversion. An example system may comprise an accumulator circuit, a bit generator circuit, and a feedback circuit. The accumulator circuit may be operable to receive a signal to be spread and generate an output based on the signal to be spread and on one or more inputs generated within the system. The bit generator circuit may be operable to input into the accumulator circuit sequences meeting at least one particular criterion. The feedback circuit may be operable to apply an adjustment to a signal corresponding to an output of the accumulator circuit to generate a feedback signal, and input the feedback signal into the accumulator circuit.

Noise introduced in an output signal of a pulse-width modulator (PWM) may be reduced by changing the time duration that a switch is driving the output node. Because the power supplies coupled to the switches are the source of noise in the output signal of the PWM, the time duration that the power supplies are driving the output may be reduced to obtain a subsequent reduction in noise in the output signal. For example, when a small signal is desired to be output by the PWM, the switches may be operated for shorter time durations. Thus, the switches couple the noise sources to ground for a duration of a cycle to reduce contribution of noise to the output. But, when a larger signal is desired to be output by the PWM, the switches may be operated for longer time durations or the conventional time durations described above.

Methods and systems are provided for spreading spectral density of pulse streams during digital to analog conversion. An example system may comprise an accumulator circuit, a bit generator circuit, and a feedback circuit. The accumulator circuit may be operable to receive a signal to be spread and generate an output based on the signal to be spread and on one or more inputs generated within the system. The bit generator circuit may be operable to input into the accumulator circuit sequences meeting at least one particular criterion. The feedback circuit may be operable to apply an adjustment to a signal corresponding to an output of the accumulator circuit to generate a feedback signal, and input the feedback signal into the accumulator circuit.

Noise introduced in an output signal of a pulse-width modulator (PWM) may be reduced by changing the time duration that a switch is driving the output node. Because the power supplies coupled to the switches are the source of noise in the output signal of the PWM, the time duration that the power supplies are driving the output may be reduced to obtain a subsequent reduction in noise in the output signal. For example, when a small signal is desired to be output by the PWM, the switches may be operated for shorter time durations. Thus, the switches couple the noise sources to ground for a duration of a cycle to reduce contribution of noise to the output. But, when a larger signal is desired to be output by the PWM, the switches may be operated for longer time durations or the conventional time durations described above.

A receiver includes a receiver circuit to receive a pulse width modulated signal, which assumes a first signal level, a second signal level and an intermediate signal level between the first signal level and the second signal level. The receiver further includes a quantization circuit to determine a value encoded in the signal based on an intermediate time period between a first transition and an intermediate transition and based on a main time period between the first transition and a second transition. The first transition comprises the first signal level, wherein the intermediate transition includes the intermediate signal level. The second transition includes the second signal level.

Methods and systems are provided for spreading spectral density of pulse streams during digital to analog conversion. An example spreading circuit may comprise an accumulator circuit, a bit generator circuit, a comparator circuit, and an inverter circuit. The accumulator circuit may be operable to receive a signal to be spread and generate an output based on the signal to be spread and at least one other input. The bit generator circuit may be operable to input into the accumulator circuit zero-sum sequences. The comparator circuit may be operable to provide a stream of pulses based on the output of the accumulator circuit. The inverter circuit may be operable to invert output of the comparator circuit, wherein output of the inverter circuit is input into the accumulator circuit.

Systems and methods for digital signal synthesis with variable sample rate digital-to-analog converters (DACs) in accordance with various embodiments of the invention are described. One embodiment includes a digital frequency generator that includes a direct digital frequency synthesizer (DDFS); a digital-to-analog converter (DAC); a frequency/phase estimation circuit; a stable reference clock (REF CLK); a variable frequency sample clock; a frequency control word (FCW); where the DAC is sampled by the variable frequency sample clock; where the DDFS is clocked by the variable frequency sample clock; where the frequency/phase estimation circuit receives as inputs the stable REF CLK and the variable frequency sample clock and estimates a FCW frequency error and adjusts the FCW to the DDFS; where the DDFS receives the FCW and outputs a digital sine codeword at the variable frequency sample clock to the DAC, where the FCW to the DDFS is continuously adjusted to track the variable frequency sample clock.

Noise introduced in an output signal of a pulse-width modulator (PWM) may be reduced by changing the time duration that a switch is driving the output node. Because the power supplies coupled to the switches are the source of noise in the output signal of the PWM, the time duration that the power supplies are driving the output may be reduced to obtain a subsequent reduction in noise in the output signal. For example, when a small signal is desired to be output by the PWM, the switches may be operated for shorter time durations. Thus, the switches couple the noise sources to ground for a duration of a cycle to reduce contribution of noise to the output. But, when a larger signal is desired to be output by the PWM, the switches may be operated for longer time durations or the conventional time durations described above.