A device and method for sigma-delta modulation may include an input signal and a plurality of integrators. The output of the integrators and a data input may be input to an adder, the sum output to be input to a quantizer to generate a quantized output signal. A reset input to the first integrator may be asserted during a first sample of the quantized output signal to reduce the signal discontinuity at the input of the first integrator, which improves the stability of the sigma-delta modulator.

This application relates to circuitry for processing sense signals generated by MEMS capacitive transducers for compensating for distortion in such sense signals. The circuitry has a signal path between an input (204) for receiving the sense signal and an output (205) for outputting an output signal based on said sense signal. Compensation circuitry (206, 207) is configured to monitor the signal at a first point along the signal path and generate a correction signal (Scorr); and modify the signal at at least a second point along said signal path based on said correction signal. The correction signal is generated as a function of the value of the signal at the first point along the signal path so as to introduce compensation components into the output signal that compensate for distortion components in the sense signal. The first point in the signal path may be before or after the second point in the signal path. The monitoring may be performed in an analogue or a digital part of the signal path and in either case the modification may be applied in an analogue or a digital part of the signal path.

A delta-sigma modulator. The delta-sigma modulator includes a loop filter (LF) and a digital-to-analog converter (DAC) connected to an input of the LF. The delta-sigma modulator also includes an asynchronous successive-approximation register (ASAR) quantizer (QTZ) connected to the DAC. The delta-sigma modulator also includes a second order noise coupling circuit (NC) connected to the ASAR and the DAC.

A data processor is disclosed. The data processor includes a data processing module. The data processing modules includes an input for receiving an input signal, an output for providing a quantized output signal, a combining unit configured to combine a feedback signal from the output with the input signal and a quantizer configured to provide the quantized output signal based on the combined signal. The data processor further includes a correction module configured to receive the quantized output signal, generate a full-scale digital signal based on the quantized output signal, determine a metastability error in the full-scale digital signal and provide a compensated output signal based on the quantized output signal and the determined metastability error.

A data processor is disclosed. The data processor includes a data processing module. The data processing modules includes an input for receiving an input signal, an output for providing a quantized output signal, a combining unit configured to combine a feedback signal from the output with the input signal and a quantizer configured to provide the quantized output signal based on the combined signal. The data processor further includes a correction module configured to receive the quantized output signal, generate a full-scale digital signal based on the quantized output signal, determine a metastability error in the full-scale digital signal and provide a compensated output signal based on the quantized output signal and the determined metastability error.

An analog/digital converter (ADC) includes an analog stage with at least one first sigma-delta modulator and includes a digital stage with at least one second sigma-delta modulator. The analog stage is configured for outputting a digital signal to the digital stage that is indicative of a noise contribution of the at least one first sigma-delta modulator. The analog stage and the digital stage may be arranged in a multi-stage noise shaping architecture (MASH) architecture.

Disclosed is a circuit including: a loop filter to perform digital processing on a signal inputted from an outside; multiple quantizers to output 1-bit signals corresponding to magnitude relationships with thresholds on the basis of the signal after the digital processing by the loop filter; and an averaging circuit to calculate the average of the values shown by the signals outputted by the quantizers, and to feed back the average to the loop filter, in which the thresholds used by the quantizers differ from one another.

This application relates to circuitry for processing sense signals generated by MEMS capacitive transducers for compensating for distortion in such sense signals. The circuitry has a signal path between an input (204) for receiving the sense signal and an output (205) for outputting an output signal based on said sense signal. Compensation circuitry (206, 207) is configured to monitor the signal at a first point along the signal path and generate a correction signal (Scorr); and modify the signal at at least a second point along said signal path based on said correction signal. The correction signal is generated as a function of the value of the signal at the first point along the signal path so as to introduce compensation components into the output signal that compensate for distortion components in the sense signal. The first point in the signal path may be before or after the second point in the signal path. The monitoring may be performed in an analogue or a digital part of the signal path and in either case the modification may be applied in an analogue or a digital part of the signal path.

This application relates to circuitry for processing sense signals generated by MEMS capacitive transducers for compensating for distortion in such sense signals. The circuitry has a signal path between an input (204) for receiving the sense signal and an output (205) for outputting an output signal based on said sense signal. Compensation circuitry (206, 207) is configured to monitor the signal at a first point along the signal path and generate a correction signal (S.sub.corr); and modify the signal at at least a second point along said signal path based on said correction signal. The correction signal is generated as a function of the value of the signal at the first point along the signal path so as to introduce compensation components into the output signal that compensate for distortion components in the sense signal. The first point in the signal path may be before or after the second point in the signal path. The monitoring may be performed in an analogue or a digital part of the signal path and in either case the modification may be applied in an analogue or a digital part of the signal path.

In accordance with an embodiment, a continuous-time delta-sigma analog-to-digital converter (ADC) includes: a continuous-time loop filter having an input coupled to an input of the continuous-time delta-sigma ADC; a multi-bit quantizer coupled to an output of the continuous-time loop filter; a 1-bit or 1.5 bit digital delta-sigma modulator having an input coupled to an output of the multi-bit quantizer and an output coupled to an input of the continuous-time loop filter; and a multi-bit digital delta-sigma modulator configured to requantize quantization error of the 1-bit or 1.5-bit digital delta-sigma modulator and having an output coupled to the input of the continuous-time loop filter and to an input of the 1-bit or 1.5-bit digital delta-sigma modulator.