Patent classifications
H03M13/09
TRANSPORT BLOCK MAPPING ACROSS SLOTS
A system and a method are disclosed relating to a transport block processing chain for a transmitter. A code block determination circuit may be configured to determine a size of a code block that maps across multiple slots of a wireless physical shared channel according to a Transport Block over Multiple Slots (TBoMS) configuration, and a rate matching circuit may be configured to rate match bits of the code block to a number of bits available in a transport block that spans the predetermined number of slots of the wireless physical shared channel. Additionally, an interleaver may be configured to interleave a continuous output of the rate matching circuit on a slot basis so that a code block that crosses a slot boundary between a first slot and a second slot is interleaved within the first slot and the second slot.
Decoding system and method for low latency bit-flipping successive cancellation decoding for polar codes
A method for decoding a signal encoded with polar codes by a decoding system is provided. The method comprises receiving, from a transmission system, a signal in which a plurality of cyclic redundancy checks (CRCs) are encoded by the polar codes, the plurality of CRCs being inserted into positions determined based on a plurality of information bits, a number of the plurality of information bits and a total code length, and decoding a code section including bits ranging from a first bit of the signal to a position where a last bit of a first CRC is inserted. The method further comprises re-performing successive cancellation flip decoding for the decoded code section, or determining whether to decode a next code section adjacent to the decoded code section, based on whether a CRC is detected in the decoded code section.
Decoding system and method for low latency bit-flipping successive cancellation decoding for polar codes
A method for decoding a signal encoded with polar codes by a decoding system is provided. The method comprises receiving, from a transmission system, a signal in which a plurality of cyclic redundancy checks (CRCs) are encoded by the polar codes, the plurality of CRCs being inserted into positions determined based on a plurality of information bits, a number of the plurality of information bits and a total code length, and decoding a code section including bits ranging from a first bit of the signal to a position where a last bit of a first CRC is inserted. The method further comprises re-performing successive cancellation flip decoding for the decoded code section, or determining whether to decode a next code section adjacent to the decoded code section, based on whether a CRC is detected in the decoded code section.
Messaging between remote controller and forwarding element
Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.
Messaging between remote controller and forwarding element
Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.
IMAGER VERIFICATION SYSTEMS AND METHODS
Techniques for facilitating imager verification systems and methods are provided. In one example, an imaging device includes a focal plane array. The focal plane array includes a detector array including a plurality of detectors, where each of the plurality of detectors is configured to detect electromagnetic radiation to obtain image data. The focal plane array further includes a readout circuit configured to perform a readout to obtain the image data from each of the plurality of detectors. The imaging device further includes a processing circuit configured to perform a verification of the imaging device based at least on the image data. Related methods and systems are also provided.
VERIFYING COMPRESSED STREAM FUSED WITH COPY OR TRANSFORM OPERATIONS
Methods and apparatus relating to verifying a compressed stream fused with copy or transform operation(s) are described. In an embodiment, compression logic circuitry compresses input data and stores the compressed data in a temporary buffer. The compression logic circuitry determines a first checksum value corresponding to the compressed data stored in the temporary buffer. Decompression logic circuitry performs a decompress-verify operation and a copy operation. The decompress-verify operation decompresses the compressed data stored in the temporary buffer to determine a second checksum value corresponding to the decompressed data from the temporary buffer. The copy operation transfers the compressed data from the temporary buffer to a destination buffer in response to a match between the first checksum value and the second checksum value. Other embodiments are also disclosed and claimed.
5G-NR SOFTWARE INTERFACE
Apparatuses, systems, and techniques to perform and facilitate an interface for multi-user and/or multi-cell physical layer (PHY) signal processing pipelines in a fifth generation (5G) new radio (NR) network. In at least one embodiment, a software interface facilitates scalable execution of multi-user and/or multi-cell information by a 5G-NR PHY software library implementing one or more signal processing pipelines.
METHOD AND SYSTEM FOR ERROR CHECKING IN WIRELESS COMMUNICATIONS
A method and system for error checking in a wireless communication are provided. The method includes: receiving a payload; determining a final decoding result of the payload, the final decoding result indicating a start state and an end state; determining whether the end state is identical to the start state based on a state circularity check; and determining to discard the final decoding result based on whether the end state is identical to the start state.
METHOD AND SYSTEM FOR ERROR CHECKING IN WIRELESS COMMUNICATIONS
A method and system for error checking in a wireless communication are provided. The method includes: receiving a payload; determining a final decoding result of the payload, the final decoding result indicating a start state and an end state; determining whether the end state is identical to the start state based on a state circularity check; and determining to discard the final decoding result based on whether the end state is identical to the start state.