An electronic device and an operating method of an electronic device are provided. The operating method includes configuring a self-correction condition for adjusting an information deletion and dropout rate, performing iterative decoding on the received information using decoding factors and a self-correction technique, determining whether decoding of the codeword succeeds or fails, based on a result of the decoding, storing a received signal and the codeword which are successfully decoded, based on a determination result, and optimizing the decoding factors, based on the stored received signal and codeword.

A storage device includes: a memory; and a processor configured to, at the time of writing data into the memory, generate a first check code common to a plurality of types of error correction codes from the data on the basis of a correlation relationship between the plurality of types of error correction codes, add the first check code to the data and write the data into the memory, convert the first check code into a second check code based on any one of the plurality of types of error correction codes at the time of reading the data from the memory, and perform error correction by using the second check code.

Certain aspects of the present disclosure generally relate to wireless communications and, more particularly, to methods and apparatus for segmenting uplink control information prior for encoding using a polar code prior to transmission. An exemplary method that may be performed by a wireless device generally includes iteratively segmenting a group of K information bits into a plurality of segments, encoding the information bits of each of the plurality of segments using a polar code to generate a plurality of encoded segments, and transmitting the plurality of encoded segments.

Certain aspects of the present disclosure generally relate to wireless communications and, more particularly, to methods and apparatus for segmenting uplink control information prior for encoding using a polar code prior to transmission. An exemplary method that may be performed by a wireless device generally includes iteratively segmenting a group of K information bits into a plurality of segments, encoding the information bits of each of the plurality of segments using a polar code to generate a plurality of encoded segments, and transmitting the plurality of encoded segments.

A memory system includes a non-volatile memory and a controller. The controller is configured to perform iterative correction on a plurality of frames of data read from the non-volatile memory. The iterative correction includes performing a first error correction on each of the frames including a first frame having errors not correctable by the first error correction, generating a syndrome on a set of second frames that include the first frame, performing a second error correction on the second frames using the syndrome, and performing a third error correction on the first frame. Each of the frames includes user data and first parity data used in the first error correction, the first parity data of the first frame also being used in the third error correction.

A data storage device is disclosed comprising a non-volatile storage medium (NVSM). Problematic patterns in a block of input data are identified, and the problematic patterns are relocated from an initial location to an erasure region of the block to generate a modified block. The modified block is erasure encoded into an erasure codeword, at least part of the erasure codeword is stored in the NVSM.

A system and method for selecting a number of cyclic redundancy check bits in a communication system. In one embodiment, an apparatus operating in a communication system is configured to receive scheduling information from the communication system, and determine an information block length (K) and/or code rate (R) for a code block including a sequence of data bits from the scheduling information. The apparatus is further configured to determine a number of cyclic redundancy check (CRC) bits as a function of the information block length (K) and/or code rate (R) for the code block.

A data processing method and apparatus. The data process method includes: determining, by a transmitting node, a code block length N.sub.0 for encoding an information bit sequence to be transmitted according to a data characteristic for representing the information bit sequence to be transmitted and a preset parameter corresponding to the data characteristic; performing, by the transmitting node, polar encoding on the information bit sequence to be transmitted according to the code block length N.sub.0; and transmitting, by the transmitting node, a code block obtained through the polar encoding to a receiving node.

Disclosed are methods and systems for using softbit decoding techniques in retransmission-based networks for error concealment of packets corrupted by bit-errors. The softbit decoding techniques derive softbit information from multiple corrupted hardbits of the retransmitted packet to aid a softbit decoder in decoding the packet. The approach realizes improved error concealment capability while maintaining a simple system architecture. A retransmission softbit module is inserted between a channel decoder used for channel-decoding and demodulating a compressed packet and the softbit decoder. The retransmission softbit module may derive an accumulated softbit packet from multiple corrupted copies of the packet received from the channel decoder, make bit decisions based on the accumulated softbit packet, and derive reliability information for the bit decisions. The bit decisions may be a majority decision packet (MDP) created using a majority voting scheme. The reliability information and the MDP may be provided to the softbit decoder for decoding.

Examples of the present disclosure provide apparatuses and methods for error code calculation. The apparatus can include an array of memory cells that are coupled to sense lines. The apparatus can include a controller configured to control a sensing circuitry, that is coupled to the sense lines, to perform a number of operations without transferring data via an input/output (I/O) lines. The sensing circuitry can be controlled to calculate an error code for data stored in the array of memory cells and compare the error code with an initial error code for the data to determine whether the data has been modified.