1. A method comprising: receiving input data including an array of information bits in a number equal to a first number, and encoding, through a polar code, said input data into a codeword having an array of codeword bits in a number equal to a second number, the codeword bits including said information bits and a plurality of frozen bits;
wherein said encoding comprises: determining a third number as the lowest power of two number that is higher than said second number; accessing an information content indicative of a bit unreliability associated with each bit position in said array of codeword bits; selecting, among the bit positions in the information content, the bit positions associated with a number of highest bit unreliabilities equal to a fourth number, to obtain selected bit positions, said fourth number being equal to a difference between the third number and the second number; determining extended input data by adding to the input data a number of redundant bits equal to said fourth number, wherein said adding comprises adding, in the input data, the number of redundant bits in the respective selected bit positions; through the polar code, encoding the extended input data and a number of frozen bits equal to a difference between the second number and the first number, thereby obtaining an extended codeword including said codeword; wherein the method further comprises, after said decoding, deleting said added number of redundant bits in order to obtain output data corresponding to the input data.

1. A method comprising: receiving input data including an array of information bits in a number equal to a first number, and encoding, through a polar code, said input data into a codeword having an array of codeword bits in a number equal to a second number, the codeword bits including said information bits and a plurality of frozen bits;
wherein said encoding comprises: determining a third number as the lowest power of two number that is higher than said second number; accessing an information content indicative of a bit unreliability associated with each bit position in said array of codeword bits; selecting, among the bit positions in the information content, the bit positions associated with a number of highest bit unreliabilities equal to a fourth number, to obtain selected bit positions, said fourth number being equal to a difference between the third number and the second number; determining extended input data by adding to the input data a number of redundant bits equal to said fourth number, wherein said adding comprises adding, in the input data, the number of redundant bits in the respective selected bit positions; through the polar code, encoding the extended input data and a number of frozen bits equal to a difference between the second number and the first number, thereby obtaining an extended codeword including said codeword; wherein the method further comprises, after said decoding, deleting said added number of redundant bits in order to obtain output data corresponding to the input data.

The invention relates to a transmitter device and a receiver device for efficient transmission of information messages. The transmitter device superposes a selected subset of columns of a projection matrix based on an information message so as to obtain a signal for transmission. The signal is transmitted to the receiver device. The receiver device performs iterative successive interference cancellation on a received signal based on a projection matrix so as to obtain a subset of the columns of the projection matrix and therefrom obtains a recovered information message based on the subset of the columns of the projection matrix. Thereby, it is provided a sparse superposition coding scheme with quasi-orthogonal projection matrix achieving good performance in respect of spectral efficiency. Furthermore, the invention also relates to corresponding methods and a computer program.

Examples include techniques to improve error correction using an exclusive OR (XOR) rebuild scheme that includes two uncorrectable codewords. Examples include generation of soft XOR codewords using bits of correctable codewords to rebuild a codeword read from a memory that has uncorrectable errors and adjust bit reliability information to generate a new codeword having correctable errors. Examples also include techniques to prevent mis-correction due to read reference voltage shifts using non-linear transformations.

Examples include techniques to improve error correction using an exclusive OR (XOR) rebuild scheme that includes two uncorrectable codewords. Examples include generation of soft XOR codewords using bits of correctable codewords to rebuild a codeword read from a memory that has uncorrectable errors and adjust bit reliability information to generate a new codeword having correctable errors. Examples also include techniques to prevent mis-correction due to read reference voltage shifts using non-linear transformations.

A receiver includes a decision circuit, a circuit to adjust an input signal of the decision circuit, a correction circuit and a control circuit. The decision circuit makes a data decision based on an input signal of the decision circuit. The circuit to adjust the input signal of the decision circuit adjusts the input signal of the decision circuit based on an input correction signal. The correction circuit combines a plurality of signals corresponding to different input correction parameters into a preliminary input correction signal. An input of the correction circuit is coupled to an output of the decision circuit. The control circuit maps the preliminary input correction signal into the input correction signal using a nonlinear code mapping.

A receiver includes a decision circuit, a circuit to adjust an input signal of the decision circuit, a correction circuit and a control circuit. The decision circuit makes a data decision based on an input signal of the decision circuit. The circuit to adjust the input signal of the decision circuit adjusts the input signal of the decision circuit based on an input correction signal. The correction circuit combines a plurality of signals corresponding to different input correction parameters into a preliminary input correction signal. An input of the correction circuit is coupled to an output of the decision circuit. The control circuit maps the preliminary input correction signal into the input correction signal using a nonlinear code mapping.

A framework for error correction coding that takes into account the difference in bit significance in the source symbols by using an appropriate error metric and minimizing it using a Bayes decoder and an optimized codebook. The Bayes decoder performs better than standard soft and hard minimum distance decoding and the optimized codebook performs better than classical linear block codes, e.g., Hamming codes. The error metric is a norm in information symbol space and is based on a loss function appropriately defined according to an approach for assigning significance to the various bits in the source bit stream. The Bayes decoder of this metric is defined and an optimized codebook generated that optimizes this metric under a noisy channel. The framework for error correction coding is implemented for increased reduncancy in a communications system or a data storage system and is optimized to combat noise in such systems.

A receiver includes a decision circuit, a circuit to adjust an input signal of the decision circuit, a correction circuit and a control circuit. The decision circuit makes a data decision based on an input signal of the decision circuit. The circuit to adjust the input signal of the decision circuit adjusts the input signal of the decision circuit based on an input correction signal. The correction circuit combines a plurality of signals corresponding to different input correction parameters into a preliminary input correction signal. An input of the correction circuit is coupled to an output of the decision circuit. The control circuit maps the preliminary input correction signal into the input correction signal using a nonlinear code mapping.

A receiver includes a decision circuit, a circuit to adjust an input signal of the decision circuit, a correction circuit and a control circuit. The decision circuit makes a data decision based on an input signal of the decision circuit. The circuit to adjust the input signal of the decision circuit adjusts the input signal of the decision circuit based on an input correction signal. The correction circuit combines a plurality of signals corresponding to different input correction parameters into a preliminary input correction signal. An input of the correction circuit is coupled to an output of the decision circuit. The control circuit maps the preliminary input correction signal into the input correction signal using a nonlinear code mapping.