H03M13/6588

Data compression apparatus and data compression method
11349494 · 2022-05-31 · ·

A compression engine calculates replacement CRC codes, in predetermined data lengths, for DIF-in cleartext data including cleartext data and multiple CRC codes based on the cleartext data. The compression engine generates headered compressed-text data in which a header including the replacement CRC codes is added to compressed-text data in which the cleartext data is compressed, and generates code-in compressed-text data by calculating multiple CRC codes based on the headered compressed-text data to add the calculated CRC codes to the headered compressed-text data.

COMMUNICATION METHOD AND APPARATUS
20220116141 · 2022-04-14 ·

Embodiments of the present disclosure disclose a communication method and apparatus, including: obtaining to-be-encoded first information, where the first information includes a first information bit set and a second information bit set, bits included in the first information bit set are able to be obtained through correct decoding by a plurality of terminal devices, and bits included in the second information bit set are able to be obtained through correct decoding by some of the plurality of terminal devices; performing first polar encoding on the first information bit set to obtain first encoded information; performing second polar encoding on the second information bit set based on the first encoded information to obtain second encoded information; and outputting the second encoded information. Resources can be saved by implementing the embodiments of the present disclosure.

Efficient implementation of a threshold modified min-sum algorithm for low-density parity-check decoders
11309915 · 2022-04-19 · ·

A hardware efficient implementation of a threshold modified attenuated min-sum algorithm (TAMSA”) and a threshold modified offset min-sum algorithm (“TOMSA”) that improve the performance of a low density parity-check (“LDPC”) decoder by reducing the bit error rate (“BER”) compared to the conventional attenuated min-sum algorithm (“AMSA”), offset min-sum algorithm (“OMSA”), and the min-sum algorithm (“MSA”). Embodiments of the present invention preferably use circuit optimization techniques, including a parallel computing structure and lookup tables, and a field-programmable gate array (“FPGA”) or application specific integrated circuit (“ASIC”) implementation.

Method and Apparatus for Vertical Layered Decoding of Quasi-Cyclic Low-Density Parity Check Codes Using Predictive Magnitude Maps
20220085828 · 2022-03-17 ·

A method and apparatus for decoding quasi-cyclic LDPC codes using a vertical layered iterative message passing algorithm. The algorithm of the method improves the efficiency of the check node update by using one or more additional magnitudes, predicted with predictive magnitude maps, for the computation of messages and update of the check node states. The method allows reducing the computational complexity, as well as the storage requirements, of the processing units in the check node update. Several embodiments for the apparatus are presented, using one or more predictive magnitude maps, targeting significant savings in resource usage and power consumption, while minimizing the impact on the error correction performance loss.

Bit error reduction of communication systems using error correction

Disclosed in some examples are methods, systems, devices, and machine-readable mediums which optimize one or more metrics of a communication system by intentionally changing symbols in a bitstream after encoding by an error correction coder, but prior to transmission. The symbols may be changed to meet a communication metric optimization goal, such as decreasing a high PAPR, reducing an error rate, reducing an average power level (to save battery), or altering some other communication metric. The symbol that is intentionally changed is then detected by the receiver as an error and corrected by the receiver utilizing the error correction coding.

POLAR CODING METHOD, APPARATUS, AND DEVICE
20210176007 · 2021-06-10 ·

Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.

Method and apparatus for hybrid automatic repeat request in non-terrestrial network

Methods and apparatuses for HARQ in a non-terrestrial network are disclosed. An operation method of a first node may comprise receiving a transport block (TB) from a second node; classifying total soft bits for the TB into information values and sign values; configuring the information values of the total soft bits into one or more subsets; performing a compression operation on each of the one or more subsets; and performing a compression operation on the sign values. Therefore, performance of the communication system can be improved.

Smart symbol changes for optimization of communications using error correction

Disclosed in some examples are methods, systems, devices, and machine-readable mediums which optimize one or more metrics of a communication system by intentionally changing symbols in a bitstream after encoding by an error correction coder, but prior to transmission. The symbols may be changed to meet a communication metric optimization goal, such as decreasing a high PAPR, reducing an error rate, reducing an average power level (to save battery), or altering some other communication metric. The symbol that is intentionally changed is then detected by the receiver as an error and corrected by the receiver utilizing the error correction coding.

PARITY CHECK DECODING
20210099251 · 2021-04-01 ·

Apparatuses, systems, and techniques to decode encoded data. In at least one embodiment, parts of information for decoding the encoded data is provided to a plurality of processors, and parts of data decoded by the plurality of processors is combined.

Method and system for decoding data using compressed channel output information

A split decoder apparatus in a communication system provides reliable transfer of a transmitted message from a source to a destination. A channel encoder encodes the transmitted message into a transmitted codeword from a channel code and transmits the transmitted codeword over a channel. The channel produces a channel output in response to the transmitted codeword. In the split decoder apparatus, a decode client receives the channel output and generates a compressed error information, and a decode server receives the compressed error information and generates a compressed error estimate. The decode client receives the compressed error estimate and generates a message estimate. Communication complexity between the decode client and the decode server is reduced. The split decoder apparatus optionally generates a no-errors signal from the channel output, where the decode server is not activated if the no-errors signal indicates that the hard decisions correspond to a valid transmitted codeword.