The embodiments of the present application disclose a method and device for sending and receiving an optical signal. The method for sending an optical signal comprises: performing serial-to-parallel conversion on a data signal to be transmitted to obtain an I path data sequence, a Q path data sequence and a PPM path data sequence which are in parallel; performing mPQ-encoding on the I path data sequence, the Q path data sequence and the PPM path data sequence to obtain an I path and a Q path of an mPQ-encoded digital signal; shaping the I path and the Q path of the mPQ-encoded digital signal by Nyquist-filtering to obtain an I path and Q path of a filtered digital signal; performing digital-to-analog conversion on the I path and the Q path of the filtered digital signal and mapping the converted I path and Q path onto an optical carrier to obtain a target optical signal and send the same. By applying the embodiments of the present application, spectral efficiency loss in optical communication can be reduced or even eliminated while power efficiency is increased.

An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and merging at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

A radio frequency module has a substrate, a first chip inductor, an integrated circuit, and a first amplifier connected to the first chip inductor. The first chip inductor is on a first main surface of the substrate and the integrated circuit is on a second main surface of the substrate, the second main surface being opposite the first main surface. The integrated circuit includes the first amplifier. When the substrate is viewed from a direction perpendicular to the first main surface of the substrate, the first chip inductor at least partially overlaps the integrated circuit.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications capable of flexibly processing high-bandwidth and low-bandwidth RF input signal(s). The RF transceiver may selectively distribute high-bandwidth RF input signals among one or more DSP pipelines for parallel processing of the RF input signals, and the RF transceiver may coherently recombine the processed signals from the one or more DSP pipelines to generate an RF output signal. The ADDA RF transceiver includes one or more ADCs, DSPs, and DACs, all on one or more ASICs, FPGAs, or modular electronic devices in a single semiconductor package. Further, the RF transceiver is radiation tolerant at the module, circuit, and/or system level for high availability and reliability in the ionizing radiation environment present in the space environment.

A signal analysis method is described. The signal analysis method includes: receiving an input signal having unknown characteristic signal parameters; determining IQ data being associated with the input signal; determining at least one of the characteristic signal parameters based on the IQ data via an artificial intelligence circuit; and adapting at least one measurement parameter of a measurement instrument based on the at least one characteristic parameter by the artificial intelligence circuit. Moreover, a signal analysis circuit is described.

A data formatting module of a low voltage drive circuit (LVDC) includes a sample and hold circuit, an interpreter, a first buffer, a digital to digital converter circuit, and a data packeting circuit. The sample and hold circuit is operable to sample and hold an n-bit digital value of filtered digital data to produce an n-bit sampled digital data value. The interpreter is operable to convert the n-bit sampled digital data value into interpreted n-bit sampled digital data. The interpreter is operable to write the interpreted n-bit sampled digital data into the first buffer in accordance with a write clock until a digital word is formed. The digital to digital converter circuit is operable to format the digital word to produce a formatted digital word. The data packeting circuit is operable to generate a data packet from the formatted digital word and output the data packet as received digital data.

A radio-frequency (RF) sampling transmitter (e.g., of the type that may be used in 5G wireless base stations) includes a complex baseband digital-to-analog converter (DAC) response compensator that operates on a complex baseband signal at a sampling rate lower than the sampling rate of an RF sampling DAC in the RF sampling transmitter. The DAC response compensator flattens the sample-and-hold response of the RF sampling DAC only in the passband of interest, addressing the problem of a sin c response introduced by the sample-and-hold operation of the RF sampling DAC and avoiding the architectural complexity and high power consumption of an inverse sin c filter that operates on the signal at a point in the signal chain after it has already been up-converted to an RF passband.

A radio-frequency (RF) sampling transmitter (e.g., of the type that may be used in 5G wireless base stations) includes a complex baseband digital-to-analog converter (DAC) response compensator that operates on a complex baseband signal at a sampling rate lower than the sampling rate of an RF sampling DAC in the RF sampling transmitter. The DAC response compensator flattens the sample-and-hold response of the RF sampling DAC only in the passband of interest, addressing the problem of a sinc response introduced by the sample-and-hold operation of the RF sampling DAC and avoiding the architectural complexity and high power consumption of an inverse sinc filter that operates on the signal at a point in the signal chain after it has already been up-converted to an RF passband.

A low voltage drive circuit (LVDC) includes a data splitter operable to split transmit digital data into a plurality of streams of digital data. The LVDC further includes a plurality of signal generators operable to receive the plurality of streams of digital data at a plurality of data rates and generate a plurality of analog outbound data signals for the plurality of streams of digital data. A first signal generator receives a first stream of digital data of the plurality of streams of digital data at a first data rate. A second signal generator receives a second stream of digital data of the plurality of streams of digital data at a second data rate. The LVDC further includes a signal combiner operable to combine the plurality of analog outbound data signals into analog outbound data and a drive sense circuit operable to drive the analog outbound data onto a bus.

Techniques are provided for a multi-frequency sampling system. A system implementing the techniques according to an embodiment includes a first bandpass filter to filter a radio frequency (RF) signal to generate a first filtered signal in a first frequency band, and a second bandpass filter to filter the RF signal to generate a second filtered signal in a second frequency band. The system also includes a first analog to digital converter (ADC) operating at a first sampling frequency to convert the first filtered signal to a first digital signal and a second ADC operating at a second sampling frequency to convert the second filtered signal to a second digital signal. The first frequency band is selected to avoid a first Nyquist boundary zone associated with the first sampling frequency and the second frequency band is selected to avoid a second Nyquist boundary zone associated with the second sampling frequency.