An aspect includes a filtering method including operating a first filter to filter a first input signal to generate a first output signal; operating a second filter to filter a second input signal to generate a second output signal; and selectively coupling at least a portion of the second filter with the first filter to filter a third input signal to generate a third output signal. Another aspect includes a filtering method including operating switching devices to configure a filter with a first set of pole(s); filtering a first input signal to generate a first output signal with the filter configured with the first set of pole(s); operating the switching devices to configure the filter with a second set of poles; and filtering a second input signal to generate a second output signal with the filter configured with the second set of poles.

The present disclosure provides a signal calibration method, apparatus and device generated based on an imbalance of I path and Q path. The method includes sending a cosine signal and a sine signal through a signal generator, transmitting the cosine signal and the sine signal in the I path and the Q path respectively, the cosine signal and the sine signal being configured to loop back to a signal receiving direction after passing through a transmitting amplifier; processing a signal obtained by a down converter in the signal receiving direction; performing a phase adjustment and an amplitude adjustment by adjusting the signal generator, gain amplifiers of I path and Q path analog domains, and a corresponding digital domain, so as to determine an appropriate phase cancellation value and an appropriate amplitude cancellation value for an image signal; and calibrating the image signal corresponding to the signal to be calibrated.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications capable of flexibly processing high-bandwidth and low-bandwidth RF input signal(s). The RF transceiver may selectively distribute high-bandwidth RF input signals among one or more DSP pipelines for parallel processing of the RF input signals, and the RF transceiver may coherently recombine the processed signals from the one or more DSP pipelines to generate an RF output signal. The ADDA RF transceiver includes one or more ADCs, DSPs, and DACs, all on one or more ASICs, FPGAs, or modular electronic devices in a single semiconductor package. Further, the RF transceiver is radiation tolerant at the module, circuit, and/or system level for high availability and reliability in the ionizing radiation environment present in the space environment.

A radio frequency module has a substrate, a first chip inductor, an integrated circuit, and a first amplifier connected to the first chip inductor. The first chip inductor is on a first main surface of the substrate and the integrated circuit is on a second main surface of the substrate, the second main surface being opposite the first main surface. The integrated circuit includes the first amplifier. When the substrate is viewed from a direction perpendicular to the first main surface of the substrate, the first chip inductor at least partially overlaps the integrated circuit.

A method detects a fault on a line of an electrical power supply system, in which current values are measured at the line ends of the line and the current values are used to check whether there is a fault on the line. In order to perform monitoring of the line such that faults can be detected comparatively quickly and sensitively, it is proposed that voltage values are also measured at the line ends. The respective measured current and voltage values are used to ascertain respective comparison current values indicating the current flowing at a comparison location on the line and the respective comparison current values are used to check for the presence of a fault on the line, and a fault signal is generated if the check has resulted in a fault present on the line being detected.

A method for improving frequency response of a high-speed data acquisition device includes sampling signals received at an input of the high-speed data acquisition device at a first sampling rate and generating a digital data stream representative of the sampled input signals. The digital data stream is interpolated to generate an interpolated digital signal with a higher sample rate than the first sampling rate, and one or more finite impulse response (FIR) filters are applied to the interpolated digital signal to generate a filtered digital signal. The filtered digital signal corrects for: parasitic and/or expected response of elements from the network of resistors and capacitors in the anti-aliasing filter in the high-speed data acquisition device, and select anti-aliasing filter response characteristics. The filtered digital signal is decimated to reduce the sampling rate of the filtered digital signal and generate a decimated digital signal.

Example signal processing apparatus and signal processing methods are described. One example signal processing apparatus includes a signal matching circuit, a first signal processing branch, and a second signal processing branch. An output end of the signal matching circuit is separately coupled to an input end of the first signal processing branch and an input end of the second signal processing branch, and an output end of the first signal processing branch is coupled to the input end of the second signal processing branch.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications capable of flexibly processing high-bandwidth and low-bandwidth RF input signal(s). The RF transceiver may selectively distribute high-bandwidth RF input signals among one or more DSP pipelines for parallel processing of the RF input signals, and the RF transceiver may coherently recombine the processed signals from the one or more DSP pipelines to generate an RF output signal. The ADDA RF transceiver includes one or more ADCs, DSPs, and DACs, all on one or more ASICs, FPGAs, or modular electronic devices in a single semiconductor package. Further, the RF transceiver is radiation tolerant at the module, circuit, and/or system level for high availability and reliability in the ionizing radiation environment present in the space environment.

A radio-frequency (RF) sampling transmitter (e.g., of the type that may be used in 5G wireless base stations) includes a complex baseband digital-to-analog converter (DAC) response compensator that operates on a complex baseband signal at a sampling rate lower than the sampling rate of an RF sampling DAC in the RF sampling transmitter. The DAC response compensator flattens the sample-and-hold response of the RF sampling DAC only in the passband of interest, addressing the problem of a sinc response introduced by the sample-and-hold operation of the RF sampling DAC and avoiding the architectural complexity and high power consumption of an inverse sinc filter that operates on the signal at a point in the signal chain after it has already been up-converted to an RF passband.

An amplifier circuit unit of a radio frequency module is mounted on a substrate with a first external terminal interposed therebetween, a switch circuit unit is mounted on the substrate with a second external terminal interposed therebetween, and a matching circuit unit is mounted on the substrate with a first terminal and a second terminal interposed therebetween. The first terminal is electrically connected to the second external terminal of the switch circuit unit, and the second terminal is electrically connected to the first external terminal of the amplifier circuit unit. When viewed from a direction perpendicular to one main surface of the substrate, the first terminal is superposed with the second external terminal of the switch circuit unit, and the second terminal is superposed with the first external terminal of the amplifier circuit unit.