A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

A semiconductor chip includes a first wireless communication circuit, a local oscillator (LO) buffer, and an auxiliary path. The first wireless communication circuit has a signal path, wherein the signal path has a mixer input port and a signal node distinct from the mixer input port. The auxiliary path is used to electrically connect the LO buffer to the signal node of the signal path. The LO buffer is reused for a loop-back test function through the auxiliary path.

A transmitter circuit includes at least one transmitting signal processing device, a compensation device and a compensation value calibration device. The compensation device generates a first compensated input signal and a second compensated input signal by respectively processing input signals according to a first compensation value and a second compensation value. The transmitting signal processing device generates a first output signal and a second output signal by processing the first compensated input signal and the second compensated input signal. The compensation value calibration device receives the first output signal and the second output signal as a first feedback signal and a second feedback signal, respectively, and includes a digital signal processor. The digital signal processor determines a calibrated compensation value according to power of the first feedback signal and the second feedback signal at a predetermined frequency and the first compensation value and the second compensation value.

A transmitter circuit includes at least one transmitting signal processing device, a compensation device and a compensation value calibration device. The compensation device generates a first compensated input signal and a second compensated input signal by respectively processing input signals according to a first compensation value and a second compensation value. The transmitting signal processing device generates a first output signal and a second output signal by processing the first compensated input signal and the second compensated input signal. The compensation value calibration device receives the first output signal and the second output signal as a first feedback signal and a second feedback signal, respectively, and includes a digital signal processor. The digital signal processor determines a calibrated compensation value according to power of the first feedback signal and the second feedback signal at a predetermined frequency and the first compensation value and the second compensation value.

A direct digital radio having a high-speed RF front end in communication with an antenna, and a radio subsystem that can be configured to form a programmable multi-standard transceiver system. The high-speed RF front including RF inputs configured to receive a plurality of radio frequencies (e.g., frequencies between 400 MHz to 7.2 GHz, millimeter wave frequency signals, etc.) and wideband low noise amplifiers provides amplified signals to RF data converters, analog interfaces, digital interfaces, component interfaces, etc. The programmable multi-standard transceiver is operable in frequencies compatible with multiple networks such as private LTE and 5G networks as well as other wireless IoT standards and WiFi in multi-standard network access equipment. The programmable multi-standard transceiver can greatly reduce complexity for the baseband processing, lower the cost of the overall transceiver system, reduce power consumption, and at the same time, benefit from improvements on the digital functions through integration.

A direct digital radio having a high-speed RF front end in communication with an antenna, and a radio subsystem that can be configured to form a programmable multi-standard transceiver system. The high-speed RF front including RF inputs configured to receive a plurality of radio frequencies (e.g., frequencies between 400 MHz to 7.2 GHz, millimeter wave frequency signals, etc.) and wideband low noise amplifiers provides amplified signals to RF data converters, analog interfaces, digital interfaces, component interfaces, etc. The programmable multi-standard transceiver is operable in frequencies compatible with multiple networks such as private LTE and 5G networks as well as other wireless IoT standards and WiFi in multi-standard network access equipment. The programmable multi-standard transceiver can greatly reduce complexity for the baseband processing, lower the cost of the overall transceiver system, reduce power consumption, and at the same time, benefit from improvements on the digital functions through integration.

A wireless device includes a phase control circuit and an antenna element. The phase control circuit configured to control each of phases frequencies of the plurality of transmission signals according to a transmission direction of which each the plurality of transmission signals is output, up-convert each frequencies of the plurality of transmission signals of which the phase is controlled. The antenna element configured to radiate a signal obtained by combining the upconverted plurality of transmission signals.

A wireless device includes a phase control circuit and an antenna element. The phase control circuit configured to control each of phases frequencies of the plurality of transmission signals according to a transmission direction of which each the plurality of transmission signals is output, up-convert each frequencies of the plurality of transmission signals of which the phase is controlled. The antenna element configured to radiate a signal obtained by combining the upconverted plurality of transmission signals.

A method of pre-compensating for transmitter in-phase (I) and quadrature (Q) mismatch (IQMM) may include sending a signal through an up-converter of a transmit path to provide an up-converted signal, determining the up-converted signal, determining one or more IQMM parameters for the transmit path based on the determined up-converted signal, and determining one or more pre-compensation parameters for the transmit path based on the one or more IQMM parameters for the transmit path. In some embodiments, the up-converted signal may be determined through a receive feedback path. In some embodiments, the up-converted signal may be determined through an envelope detector.

A receiving circuit includes: a first receiving terminal for receiving a RF signal; a second receiving terminal for receiving an external oscillating signal generated by an external oscillator; a low-noise amplifier coupled with the first receiving terminal and the second receiving terminal and utilized for generating an output signal; a first switch element positioned between the second receiving terminal and the low-noise amplifier; an in-phase signal processing circuit for generating an in-phase detection signal based on the output signal; an quadrature signal processing circuit for generating an quadrature detection signal based on the output signal; and a calibration circuit for controlling the first switch element and capable of performing an I/Q mismatch calibration operation according to the in-phase detection signal and the quadrature detection signal when the first switch element is turned on.